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-rw-r--r--llvm/lib/Target/PowerPC/PPCScheduleP7.td1
1 files changed, 0 insertions, 1 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCScheduleP7.td b/llvm/lib/Target/PowerPC/PPCScheduleP7.td
index 26c80c92c90..a8678f56900 100644
--- a/llvm/lib/Target/PowerPC/PPCScheduleP7.td
+++ b/llvm/lib/Target/PowerPC/PPCScheduleP7.td
@@ -382,7 +382,6 @@ def P7Model : SchedMachineModel {
// branches), but the total internal issue bandwidth per
// cycle (from all queues) is 8.
- let MinLatency = 0; // Out-of-order dispatch.
let LoadLatency = 3; // Optimistic load latency assuming bypass.
// This is overriden by OperandCycles if the
// Itineraries are queried instead.
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