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-rw-r--r--llvm/lib/Target/PowerPC/PPCMIPeephole.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index 1b48bbaf1f4..fe4f351e639 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -1426,6 +1426,12 @@ bool PPCMIPeephole::combineSEXTAndSHL(MachineInstr &MI,
if (!MRI->hasOneNonDBGUse(SrcReg))
return false;
+ assert(SrcMI->getNumOperands() == 2 && "EXTSW should have 2 operands");
+ assert(SrcMI->getOperand(1).isReg() &&
+ "EXTSW's second operand should be a register");
+ if (!Register::isVirtualRegister(SrcMI->getOperand(1).getReg()))
+ return false;
+
LLVM_DEBUG(dbgs() << "Combining pair: ");
LLVM_DEBUG(SrcMI->dump());
LLVM_DEBUG(MI.dump());
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