1 files changed, 21 insertions, 21 deletions

diff --git a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
index 02a5cdcbcae..1b67e1e55bf 100644
--- a/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
+++ b/llvm/lib/Target/PowerPC/PPCMIPeephole.cpp
@@ -162,33 +162,33 @@ static MachineInstr *getVRegDefOrNull(MachineOperand *Op,
 static unsigned
 getKnownLeadingZeroCount(MachineInstr *MI, const PPCInstrInfo *TII) {
   unsigned Opcode = MI->getOpcode();
-  if (Opcode == PPC::RLDICL || Opcode == PPC::RLDICLo ||
-      Opcode == PPC::RLDCL  || Opcode == PPC::RLDCLo)
+  if (Opcode == PPC::RLDICL || Opcode == PPC::RLDICL_rec ||
+      Opcode == PPC::RLDCL || Opcode == PPC::RLDCL_rec)
     return MI->getOperand(3).getImm();
 
-  if ((Opcode == PPC::RLDIC || Opcode == PPC::RLDICo) &&
-       MI->getOperand(3).getImm() <= 63 - MI->getOperand(2).getImm())
+  if ((Opcode == PPC::RLDIC || Opcode == PPC::RLDIC_rec) &&
+      MI->getOperand(3).getImm() <= 63 - MI->getOperand(2).getImm())
     return MI->getOperand(3).getImm();
 
-  if ((Opcode == PPC::RLWINM  || Opcode == PPC::RLWINMo ||
-       Opcode == PPC::RLWNM   || Opcode == PPC::RLWNMo  ||
+  if ((Opcode == PPC::RLWINM || Opcode == PPC::RLWINM_rec ||
+       Opcode == PPC::RLWNM || Opcode == PPC::RLWNM_rec ||
        Opcode == PPC::RLWINM8 || Opcode == PPC::RLWNM8) &&
-       MI->getOperand(3).getImm() <= MI->getOperand(4).getImm())
+      MI->getOperand(3).getImm() <= MI->getOperand(4).getImm())
     return 32 + MI->getOperand(3).getImm();
 
-  if (Opcode == PPC::ANDIo) {
+  if (Opcode == PPC::ANDI_rec) {
     uint16_t Imm = MI->getOperand(2).getImm();
     return 48 + countLeadingZeros(Imm);
   }
 
-  if (Opcode == PPC::CNTLZW  || Opcode == PPC::CNTLZWo ||
-      Opcode == PPC::CNTTZW  || Opcode == PPC::CNTTZWo ||
+  if (Opcode == PPC::CNTLZW || Opcode == PPC::CNTLZW_rec ||
+      Opcode == PPC::CNTTZW || Opcode == PPC::CNTTZW_rec ||
       Opcode == PPC::CNTLZW8 || Opcode == PPC::CNTTZW8)
     // The result ranges from 0 to 32.
     return 58;
 
-  if (Opcode == PPC::CNTLZD  || Opcode == PPC::CNTLZDo ||
-      Opcode == PPC::CNTTZD  || Opcode == PPC::CNTTZDo)
+  if (Opcode == PPC::CNTLZD || Opcode == PPC::CNTLZD_rec ||
+      Opcode == PPC::CNTTZD || Opcode == PPC::CNTTZD_rec)
     // The result ranges from 0 to 64.
     return 57;
 
@@ -821,18 +821,18 @@ bool PPCMIPeephole::simplifyCode(void) {
         break;
       }
       case PPC::RLWINM:
-      case PPC::RLWINMo:
+      case PPC::RLWINM_rec:
       case PPC::RLWINM8:
-      case PPC::RLWINM8o: {
+      case PPC::RLWINM8_rec: {
         unsigned FoldingReg = MI.getOperand(1).getReg();
         if (!Register::isVirtualRegister(FoldingReg))
           break;
 
         MachineInstr *SrcMI = MRI->getVRegDef(FoldingReg);
         if (SrcMI->getOpcode() != PPC::RLWINM &&
-            SrcMI->getOpcode() != PPC::RLWINMo &&
+            SrcMI->getOpcode() != PPC::RLWINM_rec &&
             SrcMI->getOpcode() != PPC::RLWINM8 &&
-            SrcMI->getOpcode() != PPC::RLWINM8o)
+            SrcMI->getOpcode() != PPC::RLWINM8_rec)
           break;
         assert((MI.getOperand(2).isImm() && MI.getOperand(3).isImm() &&
                 MI.getOperand(4).isImm() && SrcMI->getOperand(2).isImm() &&
@@ -895,7 +895,7 @@ bool PPCMIPeephole::simplifyCode(void) {
         // If final mask is 0, MI result should be 0 too.
         if (FinalMask.isNullValue()) {
           bool Is64Bit = (MI.getOpcode() == PPC::RLWINM8 ||
-                          MI.getOpcode() == PPC::RLWINM8o);
+                          MI.getOpcode() == PPC::RLWINM8_rec);
 
           LLVM_DEBUG(dbgs() << "Replace Instr: ");
           LLVM_DEBUG(MI.dump());
@@ -908,11 +908,11 @@ bool PPCMIPeephole::simplifyCode(void) {
             MI.getOperand(1).ChangeToImmediate(0);
             MI.setDesc(TII->get(Is64Bit ? PPC::LI8 : PPC::LI));
           } else {
-            // Replace MI with "ANDIo reg, 0"
+            // Replace MI with "ANDI_rec reg, 0"
             MI.RemoveOperand(4);
             MI.RemoveOperand(3);
             MI.getOperand(2).setImm(0);
-            MI.setDesc(TII->get(Is64Bit ? PPC::ANDI8o : PPC::ANDIo));
+            MI.setDesc(TII->get(Is64Bit ? PPC::ANDI8_rec : PPC::ANDI_rec));
           }
           Simplified = true;
           NumRotatesCollapsed++;
@@ -925,8 +925,8 @@ bool PPCMIPeephole::simplifyCode(void) {
           // than NewME. Otherwise we get a 64 bit value after folding, but MI
           // return a 32 bit value.
 
-          // If FoldingReg has only one use and it it not RLWINMo and
-          // RLWINM8o, safe to delete its def SrcMI. Otherwise keep it.
+          // If FoldingReg has only one use and it it not RLWINM_rec and
+          // RLWINM8_rec, safe to delete its def SrcMI. Otherwise keep it.
           if (MRI->hasOneNonDBGUse(FoldingReg) &&
               (SrcMI->getOpcode() == PPC::RLWINM ||
                SrcMI->getOpcode() == PPC::RLWINM8)) {