diff options
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCFastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCFastISel.cpp | 37 |
1 files changed, 24 insertions, 13 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCFastISel.cpp b/llvm/lib/Target/PowerPC/PPCFastISel.cpp index aa55ac1f7ac..3b2d92db78b 100644 --- a/llvm/lib/Target/PowerPC/PPCFastISel.cpp +++ b/llvm/lib/Target/PowerPC/PPCFastISel.cpp @@ -861,8 +861,20 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2, } } + unsigned SrcReg1 = getRegForValue(SrcValue1); + if (SrcReg1 == 0) + return false; + + unsigned SrcReg2 = 0; + if (!UseImm) { + SrcReg2 = getRegForValue(SrcValue2); + if (SrcReg2 == 0) + return false; + } + unsigned CmpOpc; bool NeedsExt = false; + auto RC = MRI.getRegClass(SrcReg1); switch (SrcVT.SimpleTy) { default: return false; case MVT::f32: @@ -879,8 +891,15 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2, CmpOpc = PPC::EFSCMPGT; break; } - } else + } else { CmpOpc = PPC::FCMPUS; + if (isVSSRCRegClass(RC)) { + unsigned TmpReg = createResultReg(&PPC::F4RCRegClass); + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, + TII.get(TargetOpcode::COPY), TmpReg).addReg(SrcReg1); + SrcReg1 = TmpReg; + } + } break; case MVT::f64: if (HasSPE) { @@ -896,8 +915,11 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2, CmpOpc = PPC::EFDCMPGT; break; } - } else + } else if (isVSFRCRegClass(RC)) { + CmpOpc = PPC::XSCMPUDP; + } else { CmpOpc = PPC::FCMPUD; + } break; case MVT::i1: case MVT::i8: @@ -918,17 +940,6 @@ bool PPCFastISel::PPCEmitCmp(const Value *SrcValue1, const Value *SrcValue2, break; } - unsigned SrcReg1 = getRegForValue(SrcValue1); - if (SrcReg1 == 0) - return false; - - unsigned SrcReg2 = 0; - if (!UseImm) { - SrcReg2 = getRegForValue(SrcValue2); - if (SrcReg2 == 0) - return false; - } - if (NeedsExt) { unsigned ExtReg = createResultReg(&PPC::GPRCRegClass); if (!PPCEmitIntExt(SrcVT, SrcReg1, MVT::i32, ExtReg, IsZExt)) |
