diff options
Diffstat (limited to 'llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp')
| -rw-r--r-- | llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp | 38 |
1 files changed, 19 insertions, 19 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp index 2af1913db55..4c101f58601 100644 --- a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp +++ b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp @@ -62,11 +62,11 @@ namespace llvm { /// BB#0: derived from LLVM BB %entry /// Live Ins: %f1 %f3 %x6 /// <SNIP1> -/// %vreg0<def> = COPY %f1; F8RC:%vreg0 -/// %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4 -/// %vreg8<def> = LXSDX %zero8, %vreg7<kill>, %rm<imp-use>; -/// mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7 -/// BCC 76, %vreg5, <BB#2>; CRRC:%vreg5 +/// %0<def> = COPY %f1; F8RC:%0 +/// %5<def> = CMPLWI %4<kill>, 0; CRRC:%5 GPRC:%4 +/// %8<def> = LXSDX %zero8, %7<kill>, %rm<imp-use>; +/// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7 +/// BCC 76, %5, <BB#2>; CRRC:%5 /// Successors according to CFG: BB#1(?%) BB#2(?%) /// /// BB#1: derived from LLVM BB %entry @@ -75,10 +75,10 @@ namespace llvm { /// /// BB#2: derived from LLVM BB %entry /// Predecessors according to CFG: BB#0 BB#1 -/// %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>; -/// F8RC:%vreg9,%vreg8,%vreg0 +/// %9<def> = PHI %8, <BB#1>, %0, <BB#0>; +/// F8RC:%9,%8,%0 /// <SNIP2> -/// BCC 76, %vreg5, <BB#4>; CRRC:%vreg5 +/// BCC 76, %5, <BB#4>; CRRC:%5 /// Successors according to CFG: BB#3(?%) BB#4(?%) /// /// BB#3: derived from LLVM BB %entry @@ -87,8 +87,8 @@ namespace llvm { /// /// BB#4: derived from LLVM BB %entry /// Predecessors according to CFG: BB#2 BB#3 -/// %vreg13<def> = PHI %vreg12, <BB#3>, %vreg2, <BB#2>; -/// F8RC:%vreg13,%vreg12,%vreg2 +/// %13<def> = PHI %12, <BB#3>, %2, <BB#2>; +/// F8RC:%13,%12,%2 /// <SNIP3> /// BLR8 %lr8<imp-use>, %rm<imp-use>, %f1<imp-use> /// @@ -100,12 +100,12 @@ namespace llvm { /// BB#0: derived from LLVM BB %entry /// Live Ins: %f1 %f3 %x6 /// <SNIP1> -/// %vreg0<def> = COPY %f1; F8RC:%vreg0 -/// %vreg5<def> = CMPLWI %vreg4<kill>, 0; CRRC:%vreg5 GPRC:%vreg4 -/// %vreg8<def> = LXSDX %zero8, %vreg7<kill>, %rm<imp-use>; -/// mem:LD8[ConstantPool] F8RC:%vreg8 G8RC:%vreg7 +/// %0<def> = COPY %f1; F8RC:%0 +/// %5<def> = CMPLWI %4<kill>, 0; CRRC:%5 GPRC:%4 +/// %8<def> = LXSDX %zero8, %7<kill>, %rm<imp-use>; +/// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7 /// <SNIP2> -/// BCC 76, %vreg5, <BB#4>; CRRC:%vreg5 +/// BCC 76, %5, <BB#4>; CRRC:%5 /// Successors according to CFG: BB#1(0x2aaaaaaa / 0x80000000 = 33.33%) /// BB#4(0x55555554 / 0x80000000 = 66.67%) /// @@ -115,10 +115,10 @@ namespace llvm { /// /// BB#4: derived from LLVM BB %entry /// Predecessors according to CFG: BB#0 BB#1 -/// %vreg9<def> = PHI %vreg8, <BB#1>, %vreg0, <BB#0>; -/// F8RC:%vreg9,%vreg8,%vreg0 -/// %vreg13<def> = PHI %vreg12, <BB#1>, %vreg2, <BB#0>; -/// F8RC:%vreg13,%vreg12,%vreg2 +/// %9<def> = PHI %8, <BB#1>, %0, <BB#0>; +/// F8RC:%9,%8,%0 +/// %13<def> = PHI %12, <BB#1>, %2, <BB#0>; +/// F8RC:%13,%12,%2 /// <SNIP3> /// BLR8 %lr8<imp-use>, %rm<imp-use>, %f1<imp-use> /// |
