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-rw-r--r--llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp58
1 files changed, 29 insertions, 29 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
index 4c101f58601..cd078972307 100644
--- a/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
+++ b/llvm/lib/Target/PowerPC/PPCBranchCoalescing.cpp
@@ -59,45 +59,45 @@ namespace llvm {
///
/// expands to the following machine code:
///
-/// BB#0: derived from LLVM BB %entry
+/// %bb.0: derived from LLVM BB %entry
/// Live Ins: %f1 %f3 %x6
/// <SNIP1>
/// %0<def> = COPY %f1; F8RC:%0
/// %5<def> = CMPLWI %4<kill>, 0; CRRC:%5 GPRC:%4
/// %8<def> = LXSDX %zero8, %7<kill>, %rm<imp-use>;
/// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7
-/// BCC 76, %5, <BB#2>; CRRC:%5
-/// Successors according to CFG: BB#1(?%) BB#2(?%)
+/// BCC 76, %5, <%bb.2>; CRRC:%5
+/// Successors according to CFG: %bb.1(?%) %bb.2(?%)
///
-/// BB#1: derived from LLVM BB %entry
-/// Predecessors according to CFG: BB#0
-/// Successors according to CFG: BB#2(?%)
+/// %bb.1: derived from LLVM BB %entry
+/// Predecessors according to CFG: %bb.0
+/// Successors according to CFG: %bb.2(?%)
///
-/// BB#2: derived from LLVM BB %entry
-/// Predecessors according to CFG: BB#0 BB#1
-/// %9<def> = PHI %8, <BB#1>, %0, <BB#0>;
+/// %bb.2: derived from LLVM BB %entry
+/// Predecessors according to CFG: %bb.0 %bb.1
+/// %9<def> = PHI %8, <%bb.1>, %0, <%bb.0>;
/// F8RC:%9,%8,%0
/// <SNIP2>
-/// BCC 76, %5, <BB#4>; CRRC:%5
-/// Successors according to CFG: BB#3(?%) BB#4(?%)
+/// BCC 76, %5, <%bb.4>; CRRC:%5
+/// Successors according to CFG: %bb.3(?%) %bb.4(?%)
///
-/// BB#3: derived from LLVM BB %entry
-/// Predecessors according to CFG: BB#2
-/// Successors according to CFG: BB#4(?%)
+/// %bb.3: derived from LLVM BB %entry
+/// Predecessors according to CFG: %bb.2
+/// Successors according to CFG: %bb.4(?%)
///
-/// BB#4: derived from LLVM BB %entry
-/// Predecessors according to CFG: BB#2 BB#3
-/// %13<def> = PHI %12, <BB#3>, %2, <BB#2>;
+/// %bb.4: derived from LLVM BB %entry
+/// Predecessors according to CFG: %bb.2 %bb.3
+/// %13<def> = PHI %12, <%bb.3>, %2, <%bb.2>;
/// F8RC:%13,%12,%2
/// <SNIP3>
/// BLR8 %lr8<imp-use>, %rm<imp-use>, %f1<imp-use>
///
/// When this pattern is detected, branch coalescing will try to collapse
-/// it by moving code in BB#2 to BB#0 and/or BB#4 and removing BB#3.
+/// it by moving code in %bb.2 to %bb.0 and/or %bb.4 and removing %bb.3.
///
/// If all conditions are meet, IR should collapse to:
///
-/// BB#0: derived from LLVM BB %entry
+/// %bb.0: derived from LLVM BB %entry
/// Live Ins: %f1 %f3 %x6
/// <SNIP1>
/// %0<def> = COPY %f1; F8RC:%0
@@ -105,19 +105,19 @@ namespace llvm {
/// %8<def> = LXSDX %zero8, %7<kill>, %rm<imp-use>;
/// mem:LD8[ConstantPool] F8RC:%8 G8RC:%7
/// <SNIP2>
-/// BCC 76, %5, <BB#4>; CRRC:%5
-/// Successors according to CFG: BB#1(0x2aaaaaaa / 0x80000000 = 33.33%)
-/// BB#4(0x55555554 / 0x80000000 = 66.67%)
+/// BCC 76, %5, <%bb.4>; CRRC:%5
+/// Successors according to CFG: %bb.1(0x2aaaaaaa / 0x80000000 = 33.33%)
+/// %bb.4(0x55555554 / 0x80000000 = 66.67%)
///
-/// BB#1: derived from LLVM BB %entry
-/// Predecessors according to CFG: BB#0
-/// Successors according to CFG: BB#4(0x40000000 / 0x80000000 = 50.00%)
+/// %bb.1: derived from LLVM BB %entry
+/// Predecessors according to CFG: %bb.0
+/// Successors according to CFG: %bb.4(0x40000000 / 0x80000000 = 50.00%)
///
-/// BB#4: derived from LLVM BB %entry
-/// Predecessors according to CFG: BB#0 BB#1
-/// %9<def> = PHI %8, <BB#1>, %0, <BB#0>;
+/// %bb.4: derived from LLVM BB %entry
+/// Predecessors according to CFG: %bb.0 %bb.1
+/// %9<def> = PHI %8, <%bb.1>, %0, <%bb.0>;
/// F8RC:%9,%8,%0
-/// %13<def> = PHI %12, <BB#1>, %2, <BB#0>;
+/// %13<def> = PHI %12, <%bb.1>, %2, <%bb.0>;
/// F8RC:%13,%12,%2
/// <SNIP3>
/// BLR8 %lr8<imp-use>, %rm<imp-use>, %f1<imp-use>
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