diff options
Diffstat (limited to 'llvm/lib/Target/Mips')
4 files changed, 6 insertions, 13 deletions
diff --git a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp index fb220715d48..3150057fd43 100644 --- a/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp +++ b/llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp @@ -513,11 +513,7 @@ public: CpRestoreOffset = -1; const Triple &TheTriple = sti.getTargetTriple(); - if ((TheTriple.getArch() == Triple::mips) || - (TheTriple.getArch() == Triple::mips64)) - IsLittleEndian = false; - else - IsLittleEndian = true; + IsLittleEndian = TheTriple.isLittleEndian(); if (getSTI().getCPU() == "mips64r6" && inMicroMipsMode()) report_fatal_error("microMIPS64R6 is not supported", false); diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp index 498ea6fda4b..bf139088028 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsABIInfo.cpp @@ -57,7 +57,7 @@ MipsABIInfo MipsABIInfo::computeTargetABI(const Triple &TT, StringRef CPU, return MipsABIInfo::N64(); assert(Options.getABIName().empty() && "Unknown ABI option for MIPS"); - if (TT.getArch() == Triple::mips64 || TT.getArch() == Triple::mips64el) + if (TT.isMIPS64()) return MipsABIInfo::N64(); return MipsABIInfo::O32(); } diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp index f20a5b01c1b..f498d830c8f 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCAsmInfo.cpp @@ -21,16 +21,14 @@ void MipsMCAsmInfo::anchor() { } MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { IsLittleEndian = TheTriple.isLittleEndian(); - if ((TheTriple.getArch() == Triple::mips64el) || - (TheTriple.getArch() == Triple::mips64)) { + if (TheTriple.isMIPS64()) { CodePointerSize = CalleeSaveStackSlotSize = 8; } // FIXME: This condition isn't quite right but it's the best we can do until // this object can identify the ABI. It will misbehave when using O32 // on a mips64*-* triple. - if ((TheTriple.getArch() == Triple::mipsel) || - (TheTriple.getArch() == Triple::mips)) { + if (TheTriple.isMIPS32()) { PrivateGlobalPrefix = "$"; PrivateLabelPrefix = "$"; } @@ -54,8 +52,7 @@ MipsMCAsmInfo::MipsMCAsmInfo(const Triple &TheTriple) { HasMipsExpressions = true; // Enable IAS by default for O32. - if (TheTriple.getArch() == Triple::mips || - TheTriple.getArch() == Triple::mipsel) + if (TheTriple.isMIPS32()) UseIntegratedAssembler = true; // Enable IAS by default for Debian mips64/mips64el. diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp index 0b242a27df4..ce208b7f98b 100644 --- a/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp +++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsMCTargetDesc.cpp @@ -47,7 +47,7 @@ using namespace llvm; /// FIXME: Merge with the copy in MipsSubtarget.cpp StringRef MIPS_MC::selectMipsCPU(const Triple &TT, StringRef CPU) { if (CPU.empty() || CPU == "generic") { - if (TT.getArch() == Triple::mips || TT.getArch() == Triple::mipsel) + if (TT.isMIPS32()) CPU = "mips32"; else CPU = "mips64"; |
