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-rw-r--r--llvm/lib/Target/Mips/MipsLegalizerInfo.cpp3
-rw-r--r--llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp6
2 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
index fb259516be0..a816819d775 100644
--- a/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsLegalizerInfo.cpp
@@ -27,6 +27,9 @@ MipsLegalizerInfo::MipsLegalizerInfo(const MipsSubtarget &ST) {
getActionDefinitionsBuilder({G_LOAD, G_STORE})
.legalForCartesianProduct({p0, s32}, {p0});
+ getActionDefinitionsBuilder({G_AND, G_OR, G_XOR, G_SHL, G_ASHR, G_LSHR})
+ .legalFor({s32});
+
getActionDefinitionsBuilder(G_CONSTANT)
.legalFor({s32});
diff --git a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
index 35113507921..c7844c30b32 100644
--- a/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
+++ b/llvm/lib/Target/Mips/MipsRegisterBankInfo.cpp
@@ -84,6 +84,12 @@ MipsRegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
case G_LOAD:
case G_STORE:
case G_GEP:
+ case G_AND:
+ case G_OR:
+ case G_XOR:
+ case G_SHL:
+ case G_ASHR:
+ case G_LSHR:
OperandsMapping = &Mips::ValueMappings[Mips::GPRIdx];
break;
case G_CONSTANT:
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