diff options
Diffstat (limited to 'llvm/lib/Target/Mips/MipsSEInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/Mips/MipsSEInstrInfo.cpp | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp index 2bc371c5596..6ce3f88507c 100644 --- a/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp +++ b/llvm/lib/Target/Mips/MipsSEInstrInfo.cpp @@ -207,13 +207,13 @@ storeRegToStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Opc = Mips::SDC1; else if (Mips::FGR64RegClass.hasSubClassEq(RC)) Opc = Mips::SDC164; - else if (TRI->hasType(*RC, MVT::v16i8)) + else if (RC->hasType(MVT::v16i8)) Opc = Mips::ST_B; - else if (TRI->hasType(*RC, MVT::v8i16) || TRI->hasType(*RC, MVT::v8f16)) + else if (RC->hasType(MVT::v8i16) || RC->hasType(MVT::v8f16)) Opc = Mips::ST_H; - else if (TRI->hasType(*RC, MVT::v4i32) || TRI->hasType(*RC, MVT::v4f32)) + else if (RC->hasType(MVT::v4i32) || RC->hasType(MVT::v4f32)) Opc = Mips::ST_W; - else if (TRI->hasType(*RC, MVT::v2i64) || TRI->hasType(*RC, MVT::v2f64)) + else if (RC->hasType(MVT::v2i64) || RC->hasType(MVT::v2f64)) Opc = Mips::ST_D; else if (Mips::LO32RegClass.hasSubClassEq(RC)) Opc = Mips::SW; @@ -280,13 +280,13 @@ loadRegFromStack(MachineBasicBlock &MBB, MachineBasicBlock::iterator I, Opc = Mips::LDC1; else if (Mips::FGR64RegClass.hasSubClassEq(RC)) Opc = Mips::LDC164; - else if (TRI->hasType(*RC, MVT::v16i8)) + else if (RC->hasType(MVT::v16i8)) Opc = Mips::LD_B; - else if (TRI->hasType(*RC, MVT::v8i16) || TRI->hasType(*RC, MVT::v8f16)) + else if (RC->hasType(MVT::v8i16) || RC->hasType(MVT::v8f16)) Opc = Mips::LD_H; - else if (TRI->hasType(*RC, MVT::v4i32) || TRI->hasType(*RC, MVT::v4f32)) + else if (RC->hasType(MVT::v4i32) || RC->hasType(MVT::v4f32)) Opc = Mips::LD_W; - else if (TRI->hasType(*RC, MVT::v2i64) || TRI->hasType(*RC, MVT::v2f64)) + else if (RC->hasType(MVT::v2i64) || RC->hasType(MVT::v2f64)) Opc = Mips::LD_D; else if (Mips::HI32RegClass.hasSubClassEq(RC)) Opc = Mips::LW; |
