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-rw-r--r--llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h5
1 files changed, 1 insertions, 4 deletions
diff --git a/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h b/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
index 6d8cb264158..3c11edfc3fc 100644
--- a/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
+++ b/llvm/lib/Target/Mips/MCTargetDesc/MipsBaseInfo.h
@@ -123,11 +123,8 @@ namespace MipsII {
IsCTI = 1 << 4,
/// HasForbiddenSlot - Instruction has a forbidden slot.
HasForbiddenSlot = 1 << 5,
- /// IsPCRelativeLoad - A Load instruction with implicit source register
- /// ($pc) with explicit offset and destination register
- IsPCRelativeLoad = 1 << 6,
/// HasFCCRegOperand - Instruction uses an $fcc<x> register.
- HasFCCRegOperand = 1 << 7
+ HasFCCRegOperand = 1 << 6
};
}
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