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-rw-r--r--llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp62
1 files changed, 32 insertions, 30 deletions
diff --git a/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp b/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
index 2a2d9dcaf5a..ce8109d15c5 100644
--- a/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
+++ b/llvm/lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp
@@ -62,21 +62,21 @@ namespace {
bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
unsigned AsmVariant, const char *ExtraCode);
- void printOperand(const MachineInstr *MI, int opNum);
- void printUnsignedImm(const MachineInstr *MI, int opNum);
- void printMemOperand(const MachineInstr *MI, int opNum,
+ void printOperand(const MachineInstr *MI, int opNum, raw_ostream &O);
+ void printUnsignedImm(const MachineInstr *MI, int opNum, raw_ostream &O);
+ void printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
const char *Modifier = 0);
- void printFCCOperand(const MachineInstr *MI, int opNum,
+ void printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
const char *Modifier = 0);
- void printSavedRegsBitmask();
- void printHex32(unsigned int Value);
+ void printSavedRegsBitmask(raw_ostream &O);
+ void printHex32(unsigned int Value, raw_ostream &O);
const char *emitCurrentABIString();
- void emitFrameDirective();
+ void emitFrameDirective(raw_ostream &O);
- void printInstruction(const MachineInstr *MI); // autogenerated.
+ void printInstruction(const MachineInstr *MI, raw_ostream &O); // autogen'd.
void EmitInstruction(const MachineInstr *MI) {
- printInstruction(MI);
+ printInstruction(MI, O);
OutStreamer.AddBlankLine();
}
virtual void EmitFunctionBodyStart();
@@ -127,7 +127,7 @@ namespace {
// Create a bitmask with all callee saved registers for CPU or Floating Point
// registers. For CPU registers consider RA, GP and FP for saving if necessary.
-void MipsAsmPrinter::printSavedRegsBitmask() {
+void MipsAsmPrinter::printSavedRegsBitmask(raw_ostream &O) {
const TargetRegisterInfo &RI = *TM.getRegisterInfo();
const MipsFunctionInfo *MipsFI = MF->getInfo<MipsFunctionInfo>();
@@ -156,21 +156,19 @@ void MipsAsmPrinter::printSavedRegsBitmask() {
getRegisterNumbering(RI.getRARegister()));
// Print CPUBitmask
- O << "\t.mask \t"; printHex32(CPUBitmask); O << ','
- << MipsFI->getCPUTopSavedRegOff() << '\n';
+ O << "\t.mask \t"; printHex32(CPUBitmask, O);
+ O << ',' << MipsFI->getCPUTopSavedRegOff() << '\n';
// Print FPUBitmask
- O << "\t.fmask\t"; printHex32(FPUBitmask); O << ","
+ O << "\t.fmask\t"; printHex32(FPUBitmask, O); O << ","
<< MipsFI->getFPUTopSavedRegOff() << '\n';
}
// Print a 32 bit hex number with all numbers.
-void MipsAsmPrinter::
-printHex32(unsigned int Value)
-{
+void MipsAsmPrinter::printHex32(unsigned Value, raw_ostream &O) {
O << "0x";
for (int i = 7; i >= 0; i--)
- O << utohexstr( (Value & (0xF << (i*4))) >> (i*4) );
+ O << utohexstr((Value & (0xF << (i*4))) >> (i*4));
}
//===----------------------------------------------------------------------===//
@@ -178,7 +176,7 @@ printHex32(unsigned int Value)
//===----------------------------------------------------------------------===//
/// Frame Directive
-void MipsAsmPrinter::emitFrameDirective() {
+void MipsAsmPrinter::emitFrameDirective(raw_ostream &O) {
const TargetRegisterInfo &RI = *TM.getRegisterInfo();
unsigned stackReg = RI.getFrameRegister(*MF);
@@ -215,8 +213,8 @@ void MipsAsmPrinter::EmitFunctionEntryLabel() {
/// EmitFunctionBodyStart - Targets can override this to emit stuff before
/// the first basic block in the function.
void MipsAsmPrinter::EmitFunctionBodyStart() {
- emitFrameDirective();
- printSavedRegsBitmask();
+ emitFrameDirective(O);
+ printSavedRegsBitmask(O);
}
/// EmitFunctionBodyEnd - Targets can override this to emit stuff after
@@ -239,11 +237,12 @@ bool MipsAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
if (ExtraCode && ExtraCode[0])
return true; // Unknown modifier.
- printOperand(MI, OpNo);
+ printOperand(MI, OpNo, O);
return false;
}
-void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
+void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
+ raw_ostream &O) {
const MachineOperand &MO = MI->getOperand(opNum);
bool closeP = false;
@@ -307,36 +306,39 @@ void MipsAsmPrinter::printOperand(const MachineInstr *MI, int opNum) {
if (closeP) O << ")";
}
-void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum) {
+void MipsAsmPrinter::printUnsignedImm(const MachineInstr *MI, int opNum,
+ raw_ostream &O) {
const MachineOperand &MO = MI->getOperand(opNum);
if (MO.getType() == MachineOperand::MO_Immediate)
O << (unsigned short int)MO.getImm();
else
- printOperand(MI, opNum);
+ printOperand(MI, opNum, O);
}
void MipsAsmPrinter::
-printMemOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
+printMemOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
+ const char *Modifier) {
// when using stack locations for not load/store instructions
// print the same way as all normal 3 operand instructions.
if (Modifier && !strcmp(Modifier, "stackloc")) {
- printOperand(MI, opNum+1);
+ printOperand(MI, opNum+1, O);
O << ", ";
- printOperand(MI, opNum);
+ printOperand(MI, opNum, O);
return;
}
// Load/Store memory operands -- imm($reg)
// If PIC target the target is loaded as the
// pattern lw $25,%call16($28)
- printOperand(MI, opNum);
+ printOperand(MI, opNum, O);
O << "(";
- printOperand(MI, opNum+1);
+ printOperand(MI, opNum+1, O);
O << ")";
}
void MipsAsmPrinter::
-printFCCOperand(const MachineInstr *MI, int opNum, const char *Modifier) {
+printFCCOperand(const MachineInstr *MI, int opNum, raw_ostream &O,
+ const char *Modifier) {
const MachineOperand& MO = MI->getOperand(opNum);
O << Mips::MipsFCCToString((Mips::CondCode)MO.getImm());
}
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