diff options
Diffstat (limited to 'llvm/lib/Target/IA64/IA64InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/IA64/IA64InstrInfo.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/IA64/IA64InstrInfo.cpp b/llvm/lib/Target/IA64/IA64InstrInfo.cpp index 0fe0a0c37ab..54bcce13c54 100644 --- a/llvm/lib/Target/IA64/IA64InstrInfo.cpp +++ b/llvm/lib/Target/IA64/IA64InstrInfo.cpp @@ -57,14 +57,14 @@ IA64InstrInfo::InsertBranch(MachineBasicBlock &MBB,MachineBasicBlock *TBB, return 1; } -void IA64InstrInfo::copyRegToReg(MachineBasicBlock &MBB, +bool IA64InstrInfo::copyRegToReg(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI, unsigned DestReg, unsigned SrcReg, const TargetRegisterClass *DestRC, const TargetRegisterClass *SrcRC) const { if (DestRC != SrcRC) { - cerr << "Not yet supported!"; - abort(); + // Not yet supported! + return false; } if(DestRC == IA64::PRRegisterClass ) // if a bool, we use pseudocode @@ -73,6 +73,8 @@ void IA64InstrInfo::copyRegToReg(MachineBasicBlock &MBB, .addReg(IA64::r0).addReg(IA64::r0).addReg(SrcReg); else // otherwise, MOV works (for both gen. regs and FP regs) BuildMI(MBB, MI, get(IA64::MOV), DestReg).addReg(SrcReg); + + return true; } void IA64InstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, |
