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-rw-r--r--llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h51
1 files changed, 10 insertions, 41 deletions
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
index 957950156e8..7577baace20 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonMCChecker.h
@@ -15,6 +15,7 @@
#ifndef LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
#define LLVM_LIB_TARGET_HEXAGON_MCTARGETDESC_HEXAGONMCCHECKER_H
+#include "MCTargetDesc/HexagonMCInstrInfo.h"
#include "MCTargetDesc/HexagonMCTargetDesc.h"
#include "llvm/ADT/DenseMap.h"
#include "llvm/ADT/SmallVector.h"
@@ -48,40 +49,6 @@ class HexagonMCChecker {
using DefsIterator = DenseMap<unsigned, PredSet>::iterator;
DenseMap<unsigned, PredSet> Defs;
- /// Information about how a new-value register is defined or used:
- /// PredReg = predicate register, 0 if use/def not predicated,
- /// Cond = true/false for if(PredReg)/if(!PredReg) respectively,
- /// IsFloat = true if definition produces a floating point value
- /// (not valid for uses),
- /// IsNVJ = true if the use is a new-value branch (not valid for
- /// definitions).
- struct NewSense {
- unsigned PredReg;
- bool IsFloat, IsNVJ, Cond;
-
- // The special-case "constructors":
- static NewSense Jmp(bool isNVJ) {
- NewSense NS = {/*PredReg=*/0, /*IsFloat=*/false, /*IsNVJ=*/isNVJ,
- /*Cond=*/false};
- return NS;
- }
- static NewSense Use(unsigned PR, bool True) {
- NewSense NS = {/*PredReg=*/PR, /*IsFloat=*/false, /*IsNVJ=*/false,
- /*Cond=*/True};
- return NS;
- }
- static NewSense Def(unsigned PR, bool True, bool Float) {
- NewSense NS = {/*PredReg=*/PR, /*IsFloat=*/Float, /*IsNVJ=*/false,
- /*Cond=*/True};
- return NS;
- }
- };
-
- /// Set of definitions that produce new register:
- using NewSenseList = SmallVector<NewSense, 2>;
- using NewDefsIterator = DenseMap<unsigned, NewSenseList>::iterator;
- DenseMap<unsigned, NewSenseList> NewDefs;
-
/// Set of weak definitions whose clashes should be enforced selectively.
using SoftDefsIterator = std::set<unsigned>::iterator;
std::set<unsigned> SoftDefs;
@@ -102,10 +69,6 @@ class HexagonMCChecker {
using UsesIterator = std::set<unsigned>::iterator;
std::set<unsigned> Uses;
- /// Set of new values used: new register, if new-value jump.
- using NewUsesIterator = DenseMap<unsigned, NewSense>::iterator;
- DenseMap<unsigned, NewSense> NewUses;
-
/// Pre-defined set of read-only registers.
using ReadOnlyIterator = std::set<unsigned>::iterator;
std::set<unsigned> ReadOnly;
@@ -115,6 +78,9 @@ class HexagonMCChecker {
void initReg(MCInst const &, unsigned, unsigned &PredReg, bool &isTrue);
bool registerUsed(unsigned Register);
+ std::tuple<MCInst const *, unsigned, HexagonMCInstrInfo::PredicateInfo>
+ registerProducer(unsigned Register,
+ HexagonMCInstrInfo::PredicateInfo Predicated);
// Checks performed.
bool checkBranches();
@@ -122,12 +88,13 @@ class HexagonMCChecker {
bool checkNewValues();
bool checkRegisters();
bool checkRegistersReadOnly();
- bool checkEndloopBranches();
void checkRegisterCurDefs();
bool checkSolo();
bool checkShuffle();
bool checkSlots();
bool checkAXOK();
+ bool checkHWLoop();
+ bool checkCOFMax1();
static void compoundRegisterMap(unsigned &);
@@ -141,19 +108,21 @@ class HexagonMCChecker {
Hexagon::LC1 == R);
}
- bool hasValidNewValueDef(const NewSense &Use, const NewSenseList &Defs) const;
-
public:
explicit HexagonMCChecker(MCContext &Context, MCInstrInfo const &MCII,
MCSubtargetInfo const &STI, MCInst &mcb,
const MCRegisterInfo &ri, bool ReportErrors = true);
+ explicit HexagonMCChecker(HexagonMCChecker const &Check,
+ MCSubtargetInfo const &STI, bool CopyReportErrors);
bool check(bool FullCheck = true);
void reportErrorRegisters(unsigned Register);
void reportErrorNewValue(unsigned Register);
void reportError(SMLoc Loc, Twine const &Msg);
+ void reportNote(SMLoc Loc, Twine const &Msg);
void reportError(Twine const &Msg);
void reportWarning(Twine const &Msg);
+ void reportBranchErrors();
};
} // end namespace llvm
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