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-rw-r--r--llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp9
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
index b3ab6763281..fe54c19370b 100644
--- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
+++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp
@@ -765,11 +765,12 @@ public:
// MCAsmBackend
MCAsmBackend *llvm::createHexagonAsmBackend(Target const &T,
- MCRegisterInfo const & /*MRI*/,
- const Triple &TT, StringRef CPU,
- const MCTargetOptions &Options) {
+ const MCSubtargetInfo &STI,
+ MCRegisterInfo const & /*MRI*/,
+ const MCTargetOptions &Options) {
+ const Triple &TT = STI.getTargetTriple();
uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS());
- StringRef CPUString = Hexagon_MC::selectHexagonCPU(CPU);
+ StringRef CPUString = Hexagon_MC::selectHexagonCPU(STI.getCPU());
return new HexagonAsmBackend(T, TT, OSABI, CPUString);
}
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