diff options
Diffstat (limited to 'llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp index 31da9fa06d0..b3ab6763281 100644 --- a/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp +++ b/llvm/lib/Target/Hexagon/MCTargetDesc/HexagonAsmBackend.cpp @@ -655,7 +655,8 @@ public: assert(HexagonMCInstrInfo::isBundle(Inst) && "Hexagon relaxInstruction only works on bundles"); - Res = HexagonMCInstrInfo::createBundle(); + Res.setOpcode(Hexagon::BUNDLE); + Res.addOperand(MCOperand::createImm(Inst.getOperand(0).getImm())); // Copy the results into the bundle. bool Update = false; for (auto &I : HexagonMCInstrInfo::bundleInstructions(Inst)) { @@ -769,6 +770,6 @@ MCAsmBackend *llvm::createHexagonAsmBackend(Target const &T, const MCTargetOptions &Options) { uint8_t OSABI = MCELFObjectTargetWriter::getOSABI(TT.getOS()); - StringRef CPUString = Hexagon_MC::selectHexagonCPU(TT, CPU); + StringRef CPUString = Hexagon_MC::selectHexagonCPU(CPU); return new HexagonAsmBackend(T, TT, OSABI, CPUString); } |
