diff options
Diffstat (limited to 'llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp')
| -rw-r--r-- | llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp | 82 |
1 files changed, 40 insertions, 42 deletions
diff --git a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp index 8983f57390d..522c810ba0f 100644 --- a/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp +++ b/llvm/lib/Target/Hexagon/HexagonVLIWPacketizer.cpp @@ -145,23 +145,23 @@ namespace { bool PromoteToDotNew(MachineInstr* MI, SDep::Kind DepType, MachineBasicBlock::iterator &MII, const TargetRegisterClass* RC); - bool CanPromoteToDotNew(MachineInstr* MI, SUnit* PacketSU, - unsigned DepReg, - std::map <MachineInstr*, SUnit*> MIToSUnit, + bool CanPromoteToDotNew(MachineInstr *MI, SUnit *PacketSU, unsigned DepReg, + const std::map<MachineInstr *, SUnit *> &MIToSUnit, MachineBasicBlock::iterator &MII, - const TargetRegisterClass* RC); - bool CanPromoteToNewValue(MachineInstr* MI, SUnit* PacketSU, - unsigned DepReg, - std::map <MachineInstr*, SUnit*> MIToSUnit, - MachineBasicBlock::iterator &MII); - bool CanPromoteToNewValueStore(MachineInstr* MI, MachineInstr* PacketMI, - unsigned DepReg, - std::map <MachineInstr*, SUnit*> MIToSUnit); - bool DemoteToDotOld(MachineInstr* MI); - bool ArePredicatesComplements(MachineInstr* MI1, MachineInstr* MI2, - std::map <MachineInstr*, SUnit*> MIToSUnit); - bool RestrictingDepExistInPacket(MachineInstr*, - unsigned, std::map <MachineInstr*, SUnit*>); + const TargetRegisterClass *RC); + bool + CanPromoteToNewValue(MachineInstr *MI, SUnit *PacketSU, unsigned DepReg, + const std::map<MachineInstr *, SUnit *> &MIToSUnit, + MachineBasicBlock::iterator &MII); + bool CanPromoteToNewValueStore( + MachineInstr *MI, MachineInstr *PacketMI, unsigned DepReg, + const std::map<MachineInstr *, SUnit *> &MIToSUnit); + bool DemoteToDotOld(MachineInstr *MI); + bool ArePredicatesComplements( + MachineInstr *MI1, MachineInstr *MI2, + const std::map<MachineInstr *, SUnit *> &MIToSUnit); + bool RestrictingDepExistInPacket(MachineInstr *, unsigned, + const std::map<MachineInstr *, SUnit *> &); bool isNewifiable(MachineInstr* MI); bool isCondInst(MachineInstr* MI); bool tryAllocateResourcesForConstExt(MachineInstr* MI); @@ -534,9 +534,9 @@ static MachineOperand& GetStoreValueOperand(MachineInstr *MI) { // if there is a new value store in the packet. Corollary, if there is // already a store in a packet, there can not be a new value store. // Arch Spec: 3.4.4.2 -bool HexagonPacketizerList::CanPromoteToNewValueStore( MachineInstr *MI, - MachineInstr *PacketMI, unsigned DepReg, - std::map <MachineInstr*, SUnit*> MIToSUnit) { +bool HexagonPacketizerList::CanPromoteToNewValueStore( + MachineInstr *MI, MachineInstr *PacketMI, unsigned DepReg, + const std::map<MachineInstr *, SUnit *> &MIToSUnit) { const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII; // Make sure we are looking at the store, that can be promoted. if (!QII->mayBeNewStore(MI)) @@ -559,7 +559,7 @@ bool HexagonPacketizerList::CanPromoteToNewValueStore( MachineInstr *MI, for (std::vector<MachineInstr*>::iterator VI = CurrentPacketMIs.begin(), VE = CurrentPacketMIs.end(); (VI != VE); ++VI) { - SUnit* PacketSU = MIToSUnit[*VI]; + SUnit *PacketSU = MIToSUnit.find(*VI)->second; if (PacketSU->getInstr()->getDesc().mayStore() || // if we have mayStore = 1 set on ALLOCFRAME and DEALLOCFRAME, // then we don't need this @@ -659,7 +659,7 @@ bool HexagonPacketizerList::CanPromoteToNewValueStore( MachineInstr *MI, for (VI=CurrentPacketMIs.begin(), VE = CurrentPacketMIs.end(); (VI != VE); ++VI) { - SUnit* TempSU = MIToSUnit[*VI]; + SUnit *TempSU = MIToSUnit.find(*VI)->second; MachineInstr* TempMI = TempSU->getInstr(); // Following condition is true for all the instructions until PacketMI is @@ -715,11 +715,10 @@ bool HexagonPacketizerList::CanPromoteToNewValueStore( MachineInstr *MI, // can this MI to promoted to either // new value store or new value jump -bool HexagonPacketizerList::CanPromoteToNewValue( MachineInstr *MI, - SUnit *PacketSU, unsigned DepReg, - std::map <MachineInstr*, SUnit*> MIToSUnit, - MachineBasicBlock::iterator &MII) -{ +bool HexagonPacketizerList::CanPromoteToNewValue( + MachineInstr *MI, SUnit *PacketSU, unsigned DepReg, + const std::map<MachineInstr *, SUnit *> &MIToSUnit, + MachineBasicBlock::iterator &MII) { const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII; const HexagonRegisterInfo *QRI = @@ -744,12 +743,10 @@ bool HexagonPacketizerList::CanPromoteToNewValue( MachineInstr *MI, // 1. dot new on predicate - V2/V3/V4 // 2. dot new on stores NV/ST - V4 // 3. dot new on jump NV/J - V4 -- This is generated in a pass. -bool HexagonPacketizerList::CanPromoteToDotNew( MachineInstr *MI, - SUnit *PacketSU, unsigned DepReg, - std::map <MachineInstr*, SUnit*> MIToSUnit, - MachineBasicBlock::iterator &MII, - const TargetRegisterClass* RC ) -{ +bool HexagonPacketizerList::CanPromoteToDotNew( + MachineInstr *MI, SUnit *PacketSU, unsigned DepReg, + const std::map<MachineInstr *, SUnit *> &MIToSUnit, + MachineBasicBlock::iterator &MII, const TargetRegisterClass *RC) { const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII; // Already a dot new instruction. if (QII->isDotNewInst(MI) && !QII->mayBeNewStore(MI)) @@ -801,12 +798,12 @@ bool HexagonPacketizerList::CanPromoteToDotNew( MachineInstr *MI, // The P3 from a) and d) will be complements after // a)'s P3 is converted to .new form // Anti Dep between c) and b) is irrelevant for this case -bool HexagonPacketizerList::RestrictingDepExistInPacket (MachineInstr* MI, - unsigned DepReg, - std::map <MachineInstr*, SUnit*> MIToSUnit) { +bool HexagonPacketizerList::RestrictingDepExistInPacket( + MachineInstr *MI, unsigned DepReg, + const std::map<MachineInstr *, SUnit *> &MIToSUnit) { const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII; - SUnit* PacketSUDep = MIToSUnit[MI]; + SUnit *PacketSUDep = MIToSUnit.find(MI)->second; for (std::vector<MachineInstr*>::iterator VIN = CurrentPacketMIs.begin(), VEN = CurrentPacketMIs.end(); (VIN != VEN); ++VIN) { @@ -815,7 +812,7 @@ bool HexagonPacketizerList::RestrictingDepExistInPacket (MachineInstr* MI, if(!QII->isPredicated(*VIN)) continue; // Scheduling Unit for current insn in the packet - SUnit* PacketSU = MIToSUnit[*VIN]; + SUnit *PacketSU = MIToSUnit.find(*VIN)->second; // Look at dependencies between current members of the packet // and predicate defining instruction MI. @@ -859,8 +856,9 @@ static unsigned getPredicatedRegister(MachineInstr *MI, // Given two predicated instructions, this function detects whether // the predicates are complements -bool HexagonPacketizerList::ArePredicatesComplements (MachineInstr* MI1, - MachineInstr* MI2, std::map <MachineInstr*, SUnit*> MIToSUnit) { +bool HexagonPacketizerList::ArePredicatesComplements( + MachineInstr *MI1, MachineInstr *MI2, + const std::map<MachineInstr *, SUnit *> &MIToSUnit) { const HexagonInstrInfo *QII = (const HexagonInstrInfo *) TII; @@ -871,7 +869,7 @@ bool HexagonPacketizerList::ArePredicatesComplements (MachineInstr* MI1, return false; // Scheduling unit for candidate - SUnit* SU = MIToSUnit[MI1]; + SUnit *SU = MIToSUnit.find(MI1)->second; // One corner case deals with the following scenario: // Trying to add @@ -896,7 +894,7 @@ bool HexagonPacketizerList::ArePredicatesComplements (MachineInstr* MI1, VEN = CurrentPacketMIs.end(); (VIN != VEN); ++VIN) { // Scheduling Unit for current insn in the packet - SUnit* PacketSU = MIToSUnit[*VIN]; + SUnit *PacketSU = MIToSUnit.find(*VIN)->second; // If this instruction in the packet is succeeded by the candidate... if (PacketSU->isSucc(SU)) { @@ -1101,7 +1099,7 @@ bool HexagonPacketizerList::isLegalToPacketizeTogether(SUnit *SUI, SUnit *SUJ) { VI = CurrentPacketMIs.begin(), VE = CurrentPacketMIs.end(); (VI != VE && maintainNewValueJump); ++VI) { - SUnit* PacketSU = MIToSUnit[*VI]; + SUnit *PacketSU = MIToSUnit.find(*VI)->second; // NVJ can not be part of the dual jump - Arch Spec: section 7.8 if (PacketSU->getInstr()->getDesc().isCall()) { |
