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-rw-r--r--llvm/lib/Target/CellSPU/SPUOperands.td13
1 files changed, 12 insertions, 1 deletions
diff --git a/llvm/lib/Target/CellSPU/SPUOperands.td b/llvm/lib/Target/CellSPU/SPUOperands.td
index 79d1a7a348a..94271428c85 100644
--- a/llvm/lib/Target/CellSPU/SPUOperands.td
+++ b/llvm/lib/Target/CellSPU/SPUOperands.td
@@ -63,7 +63,7 @@ def HI16_vec : SDNodeXForm<scalar_to_vector, [{
// simm7 predicate - True if the immediate fits in an 7-bit signed
// field.
def simm7: PatLeaf<(imm), [{
- int sextVal = ((((int) N->getValue()) << 25) >> 25);
+ int sextVal = int(N->getSignExtended());
return (sextVal >= -64 && sextVal <= 63);
}]>;
@@ -162,6 +162,13 @@ def hi16 : PatLeaf<(imm), [{
return false;
}], HI16>;
+def bitshift : PatLeaf<(imm), [{
+ // bitshift predicate - returns true if 0 < imm <= 7 for SHLQBII
+ // (shift left quadword by bits immediate)
+ int64_t Val = N->getValue();
+ return (Val > 0 && Val <= 7);
+}]>;
+
//===----------------------------------------------------------------------===//
// Floating point operands:
//===----------------------------------------------------------------------===//
@@ -447,6 +454,10 @@ def s10imm : Operand<i16> {
let PrintMethod = "printS10ImmOperand";
}
+def s10imm_i8: Operand<i8> {
+ let PrintMethod = "printS10ImmOperand";
+}
+
def s10imm_i32: Operand<i32> {
let PrintMethod = "printS10ImmOperand";
}
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