diff options
Diffstat (limited to 'llvm/lib/Target/Alpha/AlphaISelPattern.cpp')
| -rw-r--r-- | llvm/lib/Target/Alpha/AlphaISelPattern.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp index 574f8644eeb..53d8a9e561c 100644 --- a/llvm/lib/Target/Alpha/AlphaISelPattern.cpp +++ b/llvm/lib/Target/Alpha/AlphaISelPattern.cpp @@ -76,6 +76,10 @@ namespace { setOperationAction(ISD::SREM , MVT::f32 , Expand); setOperationAction(ISD::SREM , MVT::f64 , Expand); + // setOperationAction(ISD::CTPOP , MVT::i64 , Expand); + // setOperationAction(ISD::CTTZ , MVT::i64 , Expand); + // setOperationAction(ISD::CTTZ , MVT::i64 , Expand); + //If this didn't legalize into a div.... // setOperationAction(ISD::SREM , MVT::i64, Expand); // setOperationAction(ISD::UREM , MVT::i64, Expand); @@ -1215,6 +1219,15 @@ unsigned ISel::SelectExpr(SDOperand N) { Node->dump(); assert(0 && "Node not handled!\n"); + case ISD::CTPOP: + case ISD::CTTZ: + case ISD::CTLZ: + Opc = opcode == ISD::CTPOP ? Alpha::CTPOP : + (opcode == ISD::CTTZ ? Alpha::CTTZ : Alpha::CTLZ); + Tmp1 = SelectExpr(N.getOperand(0)); + BuildMI(BB, Opc, 1, Result).addReg(Tmp1); + return Result; + case ISD::MULHU: Tmp1 = SelectExpr(N.getOperand(0)); Tmp2 = SelectExpr(N.getOperand(1)); |
