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-rw-r--r--llvm/lib/Target/ARM64/ARM64TargetMachine.cpp3
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM64/ARM64TargetMachine.cpp b/llvm/lib/Target/ARM64/ARM64TargetMachine.cpp
index 946a0ee59e2..8070ce0d8b2 100644
--- a/llvm/lib/Target/ARM64/ARM64TargetMachine.cpp
+++ b/llvm/lib/Target/ARM64/ARM64TargetMachine.cpp
@@ -165,7 +165,8 @@ bool ARM64PassConfig::addPreEmitPass() {
// Relax conditional branch instructions if they're otherwise out of
// range of their destination.
addPass(createARM64BranchRelaxation());
- if (TM->getOptLevel() != CodeGenOpt::None && EnableCollectLOH)
+ if (TM->getOptLevel() != CodeGenOpt::None && EnableCollectLOH &&
+ TM->getSubtarget<ARM64Subtarget>().isTargetMachO())
addPass(createARM64CollectLOHPass());
return true;
}
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