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-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb2.td4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index a2aa1c03e93..949ce73c24a 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -1073,7 +1073,7 @@ let hasSideEffects = 1 in {
def t2Int_MemBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dmb", "",
- [(ARMMemBarrier)]>,
+ [(ARMMemBarrierV7)]>,
Requires<[IsThumb2]> {
// FIXME: add support for options other than a full system DMB
}
@@ -1081,7 +1081,7 @@ def t2Int_MemBarrierV7 : AInoP<(outs), (ins),
def t2Int_SyncBarrierV7 : AInoP<(outs), (ins),
Pseudo, NoItinerary,
"dsb", "",
- [(ARMSyncBarrier)]>,
+ [(ARMSyncBarrierV7)]>,
Requires<[IsThumb2]> {
// FIXME: add support for options other than a full system DSB
}
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