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-rw-r--r--llvm/lib/Target/ARM/ARMInstrThumb.td19
1 files changed, 0 insertions, 19 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstrThumb.td b/llvm/lib/Target/ARM/ARMInstrThumb.td
index 842ddcde494..5b1f9a06442 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb.td
@@ -439,14 +439,6 @@ let isBranch = 1, isTerminator = 1, isBarrier = 1, isIndirectBranch = 1 in {
let Inst{2-0} = 0b000;
let Unpredictable{2-0} = 0b111;
}
- def tBXNS : TI<(outs), (ins GPR:$Rm, pred:$p), IIC_Br, "bxns${p}\t$Rm", []>,
- Requires<[IsThumb, Has8MSecExt]>,
- T1Special<{1,1,0,?}>, Sched<[WriteBr]> {
- bits<4> Rm;
- let Inst{6-3} = Rm;
- let Inst{2-0} = 0b100;
- let Unpredictable{1-0} = 0b11;
- }
}
let isReturn = 1, isTerminator = 1, isBarrier = 1 in {
@@ -504,17 +496,6 @@ let isCall = 1,
let Inst{2-0} = 0b000;
}
- // ARMv8-M Security Extensions
- def tBLXNSr : TI<(outs), (ins pred:$p, GPRnopc:$func), IIC_Br,
- "blxns${p}\t$func", []>,
- Requires<[IsThumb, Has8MSecExt]>,
- T1Special<{1,1,1,?}>, Sched<[WriteBrL]> {
- bits<4> func;
- let Inst{6-3} = func;
- let Inst{2-0} = 0b100;
- let Unpredictable{1-0} = 0b11;
- }
-
// ARMv4T
def tBX_CALL : tPseudoInst<(outs), (ins tGPR:$func),
4, IIC_Br,
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