1 files changed, 59 insertions, 6 deletions

diff --git a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
index b2c6e12a0f8..d996b24ddf0 100644
--- a/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
+++ b/llvm/lib/Target/ARM/ARMISelDAGToDAG.cpp
@@ -1306,11 +1306,11 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
   }
 
   case ARMISD::VLD2D: {
-    MVT VT = Op.getValueType();
     SDValue MemAddr, MemUpdate, MemOpc;
     if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc))
         return NULL;
-    unsigned Opc;
+    unsigned Opc = 0;
+    MVT VT = Op.getValueType();
     switch (VT.getSimpleVT()) {
     default: llvm_unreachable("unhandled VLD2D type");
     case MVT::v8i8:  Opc = ARM::VLD2d8; break;
@@ -1323,11 +1323,11 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
   }
 
   case ARMISD::VLD3D: {
-    MVT VT = Op.getValueType();
     SDValue MemAddr, MemUpdate, MemOpc;
     if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc))
         return NULL;
-    unsigned Opc;
+    unsigned Opc = 0;
+    MVT VT = Op.getValueType();
     switch (VT.getSimpleVT()) {
     default: llvm_unreachable("unhandled VLD3D type");
     case MVT::v8i8:  Opc = ARM::VLD3d8; break;
@@ -1340,11 +1340,11 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
   }
 
   case ARMISD::VLD4D: {
-    MVT VT = Op.getValueType();
     SDValue MemAddr, MemUpdate, MemOpc;
     if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc))
         return NULL;
-    unsigned Opc;
+    unsigned Opc = 0;
+    MVT VT = Op.getValueType();
     switch (VT.getSimpleVT()) {
     default: llvm_unreachable("unhandled VLD4D type");
     case MVT::v8i8:  Opc = ARM::VLD4d8; break;
@@ -1357,6 +1357,59 @@ SDNode *ARMDAGToDAGISel::Select(SDValue Op) {
     ResTys.push_back(MVT::Other);
     return CurDAG->getTargetNode(Opc, dl, ResTys, Ops, 3);
   }
+
+  case ARMISD::VST2D: {
+    SDValue MemAddr, MemUpdate, MemOpc;
+    if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc))
+        return NULL;
+    unsigned Opc = 0;
+    switch (N->getOperand(2).getValueType().getSimpleVT()) {
+    default: llvm_unreachable("unhandled VST2D type");
+    case MVT::v8i8:  Opc = ARM::VST2d8; break;
+    case MVT::v4i16: Opc = ARM::VST2d16; break;
+    case MVT::v2f32:
+    case MVT::v2i32: Opc = ARM::VST2d32; break;
+    }
+    const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc,
+                            N->getOperand(2), N->getOperand(3) };
+    return CurDAG->getTargetNode(Opc, dl, MVT::Other, Ops, 5);
+  }
+
+  case ARMISD::VST3D: {
+    SDValue MemAddr, MemUpdate, MemOpc;
+    if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc))
+        return NULL;
+    unsigned Opc = 0;
+    switch (N->getOperand(2).getValueType().getSimpleVT()) {
+    default: llvm_unreachable("unhandled VST3D type");
+    case MVT::v8i8:  Opc = ARM::VST3d8; break;
+    case MVT::v4i16: Opc = ARM::VST3d16; break;
+    case MVT::v2f32:
+    case MVT::v2i32: Opc = ARM::VST3d32; break;
+    }
+    const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc,
+                            N->getOperand(2), N->getOperand(3),
+                            N->getOperand(4) };
+    return CurDAG->getTargetNode(Opc, dl, MVT::Other, Ops, 6);
+  }
+
+  case ARMISD::VST4D: {
+    SDValue MemAddr, MemUpdate, MemOpc;
+    if (!SelectAddrMode6(Op, N->getOperand(1), MemAddr, MemUpdate, MemOpc))
+        return NULL;
+    unsigned Opc = 0;
+    switch (N->getOperand(2).getValueType().getSimpleVT()) {
+    default: llvm_unreachable("unhandled VST4D type");
+    case MVT::v8i8:  Opc = ARM::VST4d8; break;
+    case MVT::v4i16: Opc = ARM::VST4d16; break;
+    case MVT::v2f32:
+    case MVT::v2i32: Opc = ARM::VST4d32; break;
+    }
+    const SDValue Ops[] = { MemAddr, MemUpdate, MemOpc,
+                            N->getOperand(2), N->getOperand(3),
+                            N->getOperand(4), N->getOperand(5) };
+    return CurDAG->getTargetNode(Opc, dl, MVT::Other, Ops, 7);
+  }
   }
 
   return SelectCode(Op);