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-rw-r--r--llvm/lib/Target/ARM/ARMFrameLowering.cpp17
1 files changed, 2 insertions, 15 deletions
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 106894e28f0..5428bd6c94b 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -1704,19 +1704,6 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
const MCPhysReg *CSRegs = RegInfo->getCalleeSavedRegs(&MF);
for (unsigned i = 0; CSRegs[i]; ++i) {
unsigned Reg = CSRegs[i];
- if (STI.isRWPI() && Reg == ARM::R9) {
- // Paranoid check for use of R9 with RWPI. Clobbering R9 with -frwpi will
- // emit warnings about undefined behaviour but maybe theres's a valid use
- // case so on that basis allow it to be pushed/popped in the
- // prologue/epilogue.
- } else if (Reg > ARM::R0 && ARM::GPRRegClass.contains(Reg) &&
- STI.isGPRegisterReserved(Reg - ARM::R0)) {
- LLVM_DEBUG(dbgs() << printReg(Reg, TRI) << " has been reserved and"
- << " should not be allocatable"
- << " or spillable.\n");
- SavedRegs.reset(Reg);
- continue;
- }
bool Spilled = false;
if (SavedRegs.test(Reg)) {
Spilled = true;
@@ -1961,7 +1948,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
LLVM_DEBUG(dbgs() << printReg(Reg, TRI)
<< " is saved low register, RegDeficit = "
<< RegDeficit << "\n");
- } else if (!STI.isGPRegisterReserved(Reg - ARM::R0)) {
+ } else {
AvailableRegs.push_back(Reg);
LLVM_DEBUG(
dbgs()
@@ -1976,7 +1963,7 @@ void ARMFrameLowering::determineCalleeSaves(MachineFunction &MF,
--RegDeficit;
LLVM_DEBUG(dbgs() << "%r7 is saved low register, RegDeficit = "
<< RegDeficit << "\n");
- } else if (!STI.isGPRegisterReserved(7)) {
+ } else {
AvailableRegs.push_back(ARM::R7);
LLVM_DEBUG(
dbgs()
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