diff options
Diffstat (limited to 'llvm/lib/Target/ARM/ARMConstantIslandPass.cpp')
-rw-r--r-- | llvm/lib/Target/ARM/ARMConstantIslandPass.cpp | 111 |
1 files changed, 56 insertions, 55 deletions
diff --git a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp index 1e3655aac89..de08eb8c698 100644 --- a/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp +++ b/llvm/lib/Target/ARM/ARMConstantIslandPass.cpp @@ -302,7 +302,7 @@ void ARMConstantIslands::verify() { return BBInfo[LHS.getNumber()].postOffset() < BBInfo[RHS.getNumber()].postOffset(); })); - DEBUG(dbgs() << "Verifying " << CPUsers.size() << " CP users.\n"); + LLVM_DEBUG(dbgs() << "Verifying " << CPUsers.size() << " CP users.\n"); for (unsigned i = 0, e = CPUsers.size(); i != e; ++i) { CPUser &U = CPUsers[i]; unsigned UserOffset = getUserOffset(U); @@ -310,12 +310,12 @@ void ARMConstantIslands::verify() { // adjustment. if (isCPEntryInRange(U.MI, UserOffset, U.CPEMI, U.getMaxDisp()+2, U.NegOk, /* DoDump = */ true)) { - DEBUG(dbgs() << "OK\n"); + LLVM_DEBUG(dbgs() << "OK\n"); continue; } - DEBUG(dbgs() << "Out of range.\n"); + LLVM_DEBUG(dbgs() << "Out of range.\n"); dumpBBs(); - DEBUG(MF->dump()); + LLVM_DEBUG(MF->dump()); llvm_unreachable("Constant pool entry out of range!"); } #endif @@ -324,7 +324,7 @@ void ARMConstantIslands::verify() { #if !defined(NDEBUG) || defined(LLVM_ENABLE_DUMP) /// print block size and offset information - debugging LLVM_DUMP_METHOD void ARMConstantIslands::dumpBBs() { - DEBUG({ + LLVM_DEBUG({ for (unsigned J = 0, E = BBInfo.size(); J !=E; ++J) { const BasicBlockInfo &BBI = BBInfo[J]; dbgs() << format("%08x %bb.%u\t", BBI.Offset, J) @@ -341,9 +341,9 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) { MF = &mf; MCP = mf.getConstantPool(); - DEBUG(dbgs() << "***** ARMConstantIslands: " - << MCP->getConstants().size() << " CP entries, aligned to " - << MCP->getConstantPoolAlignment() << " bytes *****\n"); + LLVM_DEBUG(dbgs() << "***** ARMConstantIslands: " + << MCP->getConstants().size() << " CP entries, aligned to " + << MCP->getConstantPoolAlignment() << " bytes *****\n"); STI = &static_cast<const ARMSubtarget &>(MF->getSubtarget()); TII = STI->getInstrInfo(); @@ -394,7 +394,7 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) { // constant pool users. initializeFunctionInfo(CPEMIs); CPEMIs.clear(); - DEBUG(dumpBBs()); + LLVM_DEBUG(dumpBBs()); // Functions with jump tables need an alignment of 4 because they use the ADR // instruction, which aligns the PC to 4 bytes before adding an offset. @@ -408,7 +408,7 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) { // is no change. unsigned NoCPIters = 0, NoBRIters = 0; while (true) { - DEBUG(dbgs() << "Beginning CP iteration #" << NoCPIters << '\n'); + LLVM_DEBUG(dbgs() << "Beginning CP iteration #" << NoCPIters << '\n'); bool CPChange = false; for (unsigned i = 0, e = CPUsers.size(); i != e; ++i) // For most inputs, it converges in no more than 5 iterations. @@ -417,19 +417,19 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) { CPChange |= handleConstantPoolUser(i, NoCPIters >= CPMaxIteration / 2); if (CPChange && ++NoCPIters > CPMaxIteration) report_fatal_error("Constant Island pass failed to converge!"); - DEBUG(dumpBBs()); + LLVM_DEBUG(dumpBBs()); // Clear NewWaterList now. If we split a block for branches, it should // appear as "new water" for the next iteration of constant pool placement. NewWaterList.clear(); - DEBUG(dbgs() << "Beginning BR iteration #" << NoBRIters << '\n'); + LLVM_DEBUG(dbgs() << "Beginning BR iteration #" << NoBRIters << '\n'); bool BRChange = false; for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i) BRChange |= fixupImmediateBr(ImmBranches[i]); if (BRChange && ++NoBRIters > 30) report_fatal_error("Branch Fix Up pass failed to converge!"); - DEBUG(dumpBBs()); + LLVM_DEBUG(dumpBBs()); if (!CPChange && !BRChange) break; @@ -465,7 +465,7 @@ bool ARMConstantIslands::runOnMachineFunction(MachineFunction &mf) { } } - DEBUG(dbgs() << '\n'; dumpBBs()); + LLVM_DEBUG(dbgs() << '\n'; dumpBBs()); BBInfo.clear(); WaterList.clear(); @@ -534,10 +534,10 @@ ARMConstantIslands::doInitialConstPlacement(std::vector<MachineInstr*> &CPEMIs) // Add a new CPEntry, but no corresponding CPUser yet. CPEntries.emplace_back(1, CPEntry(CPEMI, i)); ++NumCPEs; - DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = " - << Size << ", align = " << Align <<'\n'); + LLVM_DEBUG(dbgs() << "Moved CPI#" << i << " to end of function, size = " + << Size << ", align = " << Align << '\n'); } - DEBUG(BB->dump()); + LLVM_DEBUG(BB->dump()); } /// Do initial placement of the jump tables. Because Thumb2's TBB and TBH @@ -1071,7 +1071,7 @@ bool ARMConstantIslands::isCPEntryInRange(MachineInstr *MI, unsigned UserOffset, unsigned CPEOffset = getOffsetOf(CPEMI); if (DoDump) { - DEBUG({ + LLVM_DEBUG({ unsigned Block = MI->getParent()->getNumber(); const BasicBlockInfo &BBI = BBInfo[Block]; dbgs() << "User of CPE#" << CPEMI->getOperand(0).getImm() @@ -1164,7 +1164,7 @@ int ARMConstantIslands::findInRangeCPEntry(CPUser& U, unsigned UserOffset) { // Check to see if the CPE is already in-range. if (isCPEntryInRange(UserMI, UserOffset, CPEMI, U.getMaxDisp(), U.NegOk, true)) { - DEBUG(dbgs() << "In range\n"); + LLVM_DEBUG(dbgs() << "In range\n"); return 1; } @@ -1180,8 +1180,8 @@ int ARMConstantIslands::findInRangeCPEntry(CPUser& U, unsigned UserOffset) { continue; if (isCPEntryInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.getMaxDisp(), U.NegOk)) { - DEBUG(dbgs() << "Replacing CPE#" << CPI << " with CPE#" - << CPEs[i].CPI << "\n"); + LLVM_DEBUG(dbgs() << "Replacing CPE#" << CPI << " with CPE#" + << CPEs[i].CPI << "\n"); // Point the CPUser node to the replacement U.CPEMI = CPEs[i].CPEMI; // Change the CPI in the instruction operand to refer to the clone. @@ -1266,8 +1266,8 @@ bool ARMConstantIslands::findAvailableWater(CPUser &U, unsigned UserOffset, // This is the least amount of required padding seen so far. BestGrowth = Growth; WaterIter = IP; - DEBUG(dbgs() << "Found water after " << printMBBReference(*WaterBB) - << " Growth=" << Growth << '\n'); + LLVM_DEBUG(dbgs() << "Found water after " << printMBBReference(*WaterBB) + << " Growth=" << Growth << '\n'); if (CloserWater && WaterBB == U.MI->getParent()) return true; @@ -1310,8 +1310,8 @@ void ARMConstantIslands::createNewWater(unsigned CPUserIndex, unsigned CPEOffset = UserBBI.postOffset(CPELogAlign) + Delta; if (isOffsetInRange(UserOffset, CPEOffset, U)) { - DEBUG(dbgs() << "Split at end of " << printMBBReference(*UserMBB) - << format(", expected CPE offset %#x\n", CPEOffset)); + LLVM_DEBUG(dbgs() << "Split at end of " << printMBBReference(*UserMBB) + << format(", expected CPE offset %#x\n", CPEOffset)); NewMBB = &*++UserMBB->getIterator(); // Add an unconditional branch from UserMBB to fallthrough block. Record // it for branch lengthening; this new branch will not get out of range, @@ -1354,18 +1354,17 @@ void ARMConstantIslands::createNewWater(unsigned CPUserIndex, unsigned KnownBits = UserBBI.internalKnownBits(); unsigned UPad = UnknownPadding(LogAlign, KnownBits); unsigned BaseInsertOffset = UserOffset + U.getMaxDisp() - UPad; - DEBUG(dbgs() << format("Split in middle of big block before %#x", - BaseInsertOffset)); + LLVM_DEBUG(dbgs() << format("Split in middle of big block before %#x", + BaseInsertOffset)); // The 4 in the following is for the unconditional branch we'll be inserting // (allows for long branch on Thumb1). Alignment of the island is handled // inside isOffsetInRange. BaseInsertOffset -= 4; - DEBUG(dbgs() << format(", adjusted to %#x", BaseInsertOffset) - << " la=" << LogAlign - << " kb=" << KnownBits - << " up=" << UPad << '\n'); + LLVM_DEBUG(dbgs() << format(", adjusted to %#x", BaseInsertOffset) + << " la=" << LogAlign << " kb=" << KnownBits + << " up=" << UPad << '\n'); // This could point off the end of the block if we've already got constant // pool entries following this block; only the last one is in the water list. @@ -1378,7 +1377,7 @@ void ARMConstantIslands::createNewWater(unsigned CPUserIndex, BaseInsertOffset = std::max(UserBBI.postOffset() - UPad - 8, UserOffset + TII->getInstSizeInBytes(*UserMI) + 1); - DEBUG(dbgs() << format("Move inside block: %#x\n", BaseInsertOffset)); + LLVM_DEBUG(dbgs() << format("Move inside block: %#x\n", BaseInsertOffset)); } unsigned EndInsertOffset = BaseInsertOffset + 4 + UPad + CPEMI->getOperand(2).getImm(); @@ -1422,8 +1421,8 @@ void ARMConstantIslands::createNewWater(unsigned CPUserIndex, } // We really must not split an IT block. - DEBUG(unsigned PredReg; - assert(!isThumb || getITInstrPredicate(*MI, PredReg) == ARMCC::AL)); + LLVM_DEBUG(unsigned PredReg; assert( + !isThumb || getITInstrPredicate(*MI, PredReg) == ARMCC::AL)); NewMBB = splitBlockBeforeInstr(&*MI); } @@ -1457,7 +1456,7 @@ bool ARMConstantIslands::handleConstantPoolUser(unsigned CPUserIndex, MachineBasicBlock *NewMBB; water_iterator IP; if (findAvailableWater(U, UserOffset, IP, CloserWater)) { - DEBUG(dbgs() << "Found water in range\n"); + LLVM_DEBUG(dbgs() << "Found water in range\n"); MachineBasicBlock *WaterBB = *IP; // If the original WaterList entry was "new water" on this iteration, @@ -1470,7 +1469,7 @@ bool ARMConstantIslands::handleConstantPoolUser(unsigned CPUserIndex, NewMBB = &*++WaterBB->getIterator(); } else { // No water found. - DEBUG(dbgs() << "No water found\n"); + LLVM_DEBUG(dbgs() << "No water found\n"); createNewWater(CPUserIndex, UserOffset, NewMBB); // splitBlockBeforeInstr adds to WaterList, which is important when it is @@ -1533,8 +1532,9 @@ bool ARMConstantIslands::handleConstantPoolUser(unsigned CPUserIndex, break; } - DEBUG(dbgs() << " Moved CPE to #" << ID << " CPI=" << CPI - << format(" offset=%#x\n", BBInfo[NewIsland->getNumber()].Offset)); + LLVM_DEBUG( + dbgs() << " Moved CPE to #" << ID << " CPI=" << CPI + << format(" offset=%#x\n", BBInfo[NewIsland->getNumber()].Offset)); return true; } @@ -1589,11 +1589,11 @@ bool ARMConstantIslands::isBBInRange(MachineInstr *MI,MachineBasicBlock *DestBB, unsigned BrOffset = getOffsetOf(MI) + PCAdj; unsigned DestOffset = BBInfo[DestBB->getNumber()].Offset; - DEBUG(dbgs() << "Branch of destination " << printMBBReference(*DestBB) - << " from " << printMBBReference(*MI->getParent()) - << " max delta=" << MaxDisp << " from " << getOffsetOf(MI) - << " to " << DestOffset << " offset " - << int(DestOffset - BrOffset) << "\t" << *MI); + LLVM_DEBUG(dbgs() << "Branch of destination " << printMBBReference(*DestBB) + << " from " << printMBBReference(*MI->getParent()) + << " max delta=" << MaxDisp << " from " << getOffsetOf(MI) + << " to " << DestOffset << " offset " + << int(DestOffset - BrOffset) << "\t" << *MI); if (BrOffset <= DestOffset) { // Branch before the Dest. @@ -1640,7 +1640,7 @@ ARMConstantIslands::fixupUnconditionalBr(ImmBranch &Br) { HasFarJump = true; ++NumUBrFixed; - DEBUG(dbgs() << " Changed B to long jump " << *MI); + LLVM_DEBUG(dbgs() << " Changed B to long jump " << *MI); return true; } @@ -1684,8 +1684,9 @@ ARMConstantIslands::fixupConditionalBr(ImmBranch &Br) { // b L1 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB(); if (isBBInRange(MI, NewDest, Br.MaxDisp)) { - DEBUG(dbgs() << " Invert Bcc condition and swap its destination with " - << *BMI); + LLVM_DEBUG( + dbgs() << " Invert Bcc condition and swap its destination with " + << *BMI); BMI->getOperand(0).setMBB(DestBB); MI->getOperand(0).setMBB(NewDest); MI->getOperand(1).setImm(CC); @@ -1711,9 +1712,9 @@ ARMConstantIslands::fixupConditionalBr(ImmBranch &Br) { } MachineBasicBlock *NextBB = &*++MBB->getIterator(); - DEBUG(dbgs() << " Insert B to " << printMBBReference(*DestBB) - << " also invert condition and change dest. to " - << printMBBReference(*NextBB) << "\n"); + LLVM_DEBUG(dbgs() << " Insert B to " << printMBBReference(*DestBB) + << " also invert condition and change dest. to " + << printMBBReference(*NextBB) << "\n"); // Insert a new conditional branch and a new unconditional branch. // Also update the ImmBranch as well as adding a new entry for the new branch. @@ -1806,7 +1807,7 @@ bool ARMConstantIslands::optimizeThumb2Instructions() { // FIXME: Check if offset is multiple of scale if scale is not 4. if (isCPEntryInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) { - DEBUG(dbgs() << "Shrink: " << *U.MI); + LLVM_DEBUG(dbgs() << "Shrink: " << *U.MI); U.MI->setDesc(TII->get(NewOpc)); MachineBasicBlock *MBB = U.MI->getParent(); BBInfo[MBB->getNumber()].Size -= 2; @@ -1850,7 +1851,7 @@ bool ARMConstantIslands::optimizeThumb2Branches() { unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale; MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB(); if (isBBInRange(Br.MI, DestBB, MaxOffs)) { - DEBUG(dbgs() << "Shrink branch: " << *Br.MI); + LLVM_DEBUG(dbgs() << "Shrink branch: " << *Br.MI); Br.MI->setDesc(TII->get(NewOpc)); MachineBasicBlock *MBB = Br.MI->getParent(); BBInfo[MBB->getNumber()].Size -= 2; @@ -1894,7 +1895,7 @@ bool ARMConstantIslands::optimizeThumb2Branches() { CmpMI->getOperand(1).getImm() == 0 && isARMLowRegister(Reg)) { MachineBasicBlock *MBB = Br.MI->getParent(); - DEBUG(dbgs() << "Fold: " << *CmpMI << " and: " << *Br.MI); + LLVM_DEBUG(dbgs() << "Fold: " << *CmpMI << " and: " << *Br.MI); MachineInstr *NewBR = BuildMI(*MBB, CmpMI, Br.MI->getDebugLoc(), TII->get(NewOpc)) .addReg(Reg).addMBB(DestBB,Br.MI->getOperand(0).getTargetFlags()); @@ -2063,7 +2064,7 @@ static void RemoveDeadAddBetweenLEAAndJT(MachineInstr *LEAMI, } } - DEBUG(dbgs() << "Removing Dead Add: " << *RemovableAdd); + LLVM_DEBUG(dbgs() << "Removing Dead Add: " << *RemovableAdd); RemovableAdd->eraseFromParent(); DeadSize += 4; } @@ -2209,7 +2210,7 @@ bool ARMConstantIslands::optimizeThumb2JumpTables() { DeadSize += 4; } - DEBUG(dbgs() << "Shrink JT: " << *MI); + LLVM_DEBUG(dbgs() << "Shrink JT: " << *MI); MachineInstr *CPEMI = User.CPEMI; unsigned Opc = ByteOk ? ARM::t2TBB_JT : ARM::t2TBH_JT; if (!isThumb2) @@ -2223,7 +2224,7 @@ bool ARMConstantIslands::optimizeThumb2JumpTables() { .addReg(IdxReg, getKillRegState(IdxRegKill)) .addJumpTableIndex(JTI, JTOP.getTargetFlags()) .addImm(CPEMI->getOperand(0).getImm()); - DEBUG(dbgs() << printMBBReference(*MBB) << ": " << *NewJTMI); + LLVM_DEBUG(dbgs() << printMBBReference(*MBB) << ": " << *NewJTMI); unsigned JTOpc = ByteOk ? ARM::JUMPTABLE_TBB : ARM::JUMPTABLE_TBH; CPEMI->setDesc(TII->get(JTOpc)); |