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-rw-r--r--llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp6
1 files changed, 0 insertions, 6 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
index 705f97097c1..c95d4c8f3f4 100644
--- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -1027,12 +1027,6 @@ bool ARMBaseInstrInfo::isIdentical(const MachineInstr *MI0,
return TargetInstrInfoImpl::isIdentical(MI0, MI1, MRI);
}
-bool ARMBaseInstrInfo::isProfitableToDuplicateIndirectBranch() const {
- // If the target processor can predict indirect branches, it is highly
- // desirable to duplicate them, since it can often make them predictable.
- return getSubtarget().hasBranchTargetBuffer();
-}
-
/// getInstrPredicate - If instruction is predicated, returns its predicate
/// condition, otherwise returns AL. It also returns the condition code
/// register by reference.
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