diff options
Diffstat (limited to 'llvm/lib/Target/ARC/ARCInstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/ARC/ARCInstrInfo.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARC/ARCInstrInfo.cpp b/llvm/lib/Target/ARC/ARCInstrInfo.cpp index 48d5a00d594..a299e32c03a 100644 --- a/llvm/lib/Target/ARC/ARCInstrInfo.cpp +++ b/llvm/lib/Target/ARC/ARCInstrInfo.cpp @@ -294,7 +294,7 @@ void ARCInstrInfo::storeRegToStackSlot(MachineBasicBlock &MBB, "Only support 4-byte stores to stack now."); assert(ARC::GPR32RegClass.hasSubClassEq(RC) && "Only support GPR32 stores to stack now."); - DEBUG(dbgs() << "Created store reg=" << PrintReg(SrcReg, TRI) + DEBUG(dbgs() << "Created store reg=" << printReg(SrcReg, TRI) << " to FrameIndex=" << FrameIndex << "\n"); BuildMI(MBB, I, dl, get(ARC::ST_rs9)) .addReg(SrcReg, getKillRegState(isKill)) @@ -321,7 +321,7 @@ void ARCInstrInfo::loadRegFromStackSlot(MachineBasicBlock &MBB, "Only support 4-byte loads from stack now."); assert(ARC::GPR32RegClass.hasSubClassEq(RC) && "Only support GPR32 stores to stack now."); - DEBUG(dbgs() << "Created load reg=" << PrintReg(DestReg, TRI) + DEBUG(dbgs() << "Created load reg=" << printReg(DestReg, TRI) << " from FrameIndex=" << FrameIndex << "\n"); BuildMI(MBB, I, dl, get(ARC::LD_rs9)) .addReg(DestReg, RegState::Define) |
