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-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp6
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h2
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h8
-rw-r--r--llvm/lib/Target/AMDGPU/R600FrameLowering.h6
-rw-r--r--llvm/lib/Target/AMDGPU/SIFrameLowering.h6
-rw-r--r--llvm/lib/Target/AMDGPU/SIISelLowering.cpp14
6 files changed, 21 insertions, 21 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
index e8079773636..e35b6d00a28 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.cpp
@@ -13,9 +13,9 @@
#include "AMDGPUFrameLowering.h"
using namespace llvm;
-AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, unsigned StackAl,
- int LAO, unsigned TransAl)
- : TargetFrameLowering(D, StackAl, LAO, TransAl) { }
+AMDGPUFrameLowering::AMDGPUFrameLowering(StackDirection D, Align StackAl,
+ int LAO, unsigned TransAl)
+ : TargetFrameLowering(D, StackAl, LAO, TransAl) {}
AMDGPUFrameLowering::~AMDGPUFrameLowering() = default;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
index 48b64488303..090e2bc302c 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUFrameLowering.h
@@ -25,7 +25,7 @@ namespace llvm {
/// See TargetFrameInfo for more comments.
class AMDGPUFrameLowering : public TargetFrameLowering {
public:
- AMDGPUFrameLowering(StackDirection D, unsigned StackAl, int LAO,
+ AMDGPUFrameLowering(StackDirection D, Align StackAl, int LAO,
unsigned TransAl = 1);
~AMDGPUFrameLowering() override;
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index f5848aa8089..936feb00c62 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -866,9 +866,7 @@ public:
// on the pointer value itself may rely on the alignment / known low bits of
// the pointer. Set this to something above the minimum to avoid needing
// dynamic realignment in common cases.
- unsigned getStackAlignment() const {
- return 16;
- }
+ Align getStackAlignment() const { return Align(16); }
bool enableMachineScheduler() const override {
return true;
@@ -1257,9 +1255,7 @@ public:
return Gen;
}
- unsigned getStackAlignment() const {
- return 4;
- }
+ Align getStackAlignment() const { return Align(4); }
R600Subtarget &initializeSubtargetDependencies(const Triple &TT,
StringRef GPU, StringRef FS);
diff --git a/llvm/lib/Target/AMDGPU/R600FrameLowering.h b/llvm/lib/Target/AMDGPU/R600FrameLowering.h
index 950e238f497..5b24901cf64 100644
--- a/llvm/lib/Target/AMDGPU/R600FrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/R600FrameLowering.h
@@ -15,9 +15,9 @@ namespace llvm {
class R600FrameLowering : public AMDGPUFrameLowering {
public:
- R600FrameLowering(StackDirection D, unsigned StackAl, int LAO,
- unsigned TransAl = 1) :
- AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
+ R600FrameLowering(StackDirection D, Align StackAl, int LAO,
+ unsigned TransAl = 1)
+ : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~R600FrameLowering() override;
void emitPrologue(MachineFunction &MF,
diff --git a/llvm/lib/Target/AMDGPU/SIFrameLowering.h b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
index c644f4726e2..6e07dac32df 100644
--- a/llvm/lib/Target/AMDGPU/SIFrameLowering.h
+++ b/llvm/lib/Target/AMDGPU/SIFrameLowering.h
@@ -20,9 +20,9 @@ class GCNSubtarget;
class SIFrameLowering final : public AMDGPUFrameLowering {
public:
- SIFrameLowering(StackDirection D, unsigned StackAl, int LAO,
- unsigned TransAl = 1) :
- AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
+ SIFrameLowering(StackDirection D, Align StackAl, int LAO,
+ unsigned TransAl = 1)
+ : AMDGPUFrameLowering(D, StackAl, LAO, TransAl) {}
~SIFrameLowering() override = default;
void emitEntryFunctionPrologue(MachineFunction &MF,
diff --git a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
index 18098170c9b..cb92932f32f 100644
--- a/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
+++ b/llvm/lib/Target/AMDGPU/SIISelLowering.cpp
@@ -2816,7 +2816,7 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
int32_t Offset = LocMemOffset;
SDValue PtrOff = DAG.getConstant(Offset, DL, PtrVT);
- unsigned Align = 0;
+ MaybeAlign Alignment;
if (IsTailCall) {
ISD::ArgFlagsTy Flags = Outs[realArgIdx].Flags;
@@ -2824,8 +2824,10 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
Flags.getByValSize() : VA.getValVT().getStoreSize();
// FIXME: We can have better than the minimum byval required alignment.
- Align = Flags.isByVal() ? Flags.getByValAlign() :
- MinAlign(Subtarget->getStackAlignment(), Offset);
+ Alignment =
+ Flags.isByVal()
+ ? MaybeAlign(Flags.getByValAlign())
+ : commonAlignment(Subtarget->getStackAlignment(), Offset);
Offset = Offset + FPDiff;
int FI = MFI.CreateFixedObject(OpSize, Offset, true);
@@ -2844,7 +2846,8 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
} else {
DstAddr = PtrOff;
DstInfo = MachinePointerInfo::getStack(MF, LocMemOffset);
- Align = MinAlign(Subtarget->getStackAlignment(), LocMemOffset);
+ Alignment =
+ commonAlignment(Subtarget->getStackAlignment(), LocMemOffset);
}
if (Outs[i].Flags.isByVal()) {
@@ -2859,7 +2862,8 @@ SDValue SITargetLowering::LowerCall(CallLoweringInfo &CLI,
MemOpChains.push_back(Cpy);
} else {
- SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo, Align);
+ SDValue Store = DAG.getStore(Chain, DL, Arg, DstAddr, DstInfo,
+ Alignment ? Alignment->value() : 0);
MemOpChains.push_back(Store);
}
}
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