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-rw-r--r--llvm/lib/Target/AMDGPU/R600InstrInfo.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/R600InstrInfo.h4
-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrInfo.cpp4
-rw-r--r--llvm/lib/Target/AMDGPU/SIInstrInfo.h4
4 files changed, 8 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
index 7b1b4a544ba..e88bd076718 100644
--- a/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/R600InstrInfo.cpp
@@ -778,7 +778,7 @@ unsigned R600InstrInfo::insertBranch(MachineBasicBlock &MBB,
}
}
-unsigned R600InstrInfo::RemoveBranch(MachineBasicBlock &MBB,
+unsigned R600InstrInfo::removeBranch(MachineBasicBlock &MBB,
int *BytesRemoved) const {
assert(!BytesRemoved && "code size not handled");
@@ -910,7 +910,7 @@ R600InstrInfo::isProfitableToUnpredicate(MachineBasicBlock &TMBB,
bool
-R600InstrInfo::ReverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
+R600InstrInfo::reverseBranchCondition(SmallVectorImpl<MachineOperand> &Cond) const {
MachineOperand &MO = Cond[1];
switch (MO.getImm()) {
case AMDGPU::PRED_SETE_INT:
diff --git a/llvm/lib/Target/AMDGPU/R600InstrInfo.h b/llvm/lib/Target/AMDGPU/R600InstrInfo.h
index 66d0d06df46..a280052dbd4 100644
--- a/llvm/lib/Target/AMDGPU/R600InstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/R600InstrInfo.h
@@ -159,7 +159,7 @@ public:
DFAPacketizer *
CreateTargetScheduleState(const TargetSubtargetInfo &) const override;
- bool ReverseBranchCondition(
+ bool reverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const override;
bool analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
@@ -172,7 +172,7 @@ public:
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;
- unsigned RemoveBranch(MachineBasicBlock &MBB,
+ unsigned removeBranch(MachineBasicBlock &MBB,
int *BytesRemvoed = nullptr) const override;
bool isPredicated(const MachineInstr &MI) const override;
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
index d933d807920..fcdd1fd6599 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.cpp
@@ -1105,7 +1105,7 @@ bool SIInstrInfo::analyzeBranch(MachineBasicBlock &MBB, MachineBasicBlock *&TBB,
return true;
}
-unsigned SIInstrInfo::RemoveBranch(MachineBasicBlock &MBB,
+unsigned SIInstrInfo::removeBranch(MachineBasicBlock &MBB,
int *BytesRemoved) const {
MachineBasicBlock::iterator I = MBB.getFirstTerminator();
@@ -1167,7 +1167,7 @@ unsigned SIInstrInfo::insertBranch(MachineBasicBlock &MBB,
return 2;
}
-bool SIInstrInfo::ReverseBranchCondition(
+bool SIInstrInfo::reverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const {
assert(Cond.size() == 1);
Cond[0].setImm(-Cond[0].getImm());
diff --git a/llvm/lib/Target/AMDGPU/SIInstrInfo.h b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
index aced35a852f..aeeee7d57e1 100644
--- a/llvm/lib/Target/AMDGPU/SIInstrInfo.h
+++ b/llvm/lib/Target/AMDGPU/SIInstrInfo.h
@@ -163,7 +163,7 @@ public:
SmallVectorImpl<MachineOperand> &Cond,
bool AllowModify) const override;
- unsigned RemoveBranch(MachineBasicBlock &MBB,
+ unsigned removeBranch(MachineBasicBlock &MBB,
int *BytesRemoved = nullptr) const override;
unsigned insertBranch(MachineBasicBlock &MBB, MachineBasicBlock *TBB,
@@ -171,7 +171,7 @@ public:
const DebugLoc &DL,
int *BytesAdded = nullptr) const override;
- bool ReverseBranchCondition(
+ bool reverseBranchCondition(
SmallVectorImpl<MachineOperand> &Cond) const override;
bool
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