diff options
Diffstat (limited to 'llvm/lib/Target/AMDGPU')
4 files changed, 7 insertions, 10 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp index bb7fa6bcb0e..e46e263bfa1 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUPromoteAlloca.cpp @@ -535,7 +535,7 @@ bool AMDGPUPromoteAlloca::collectUsesWithPtrTypes( std::vector<Value*> &WorkList) const { for (User *User : Val->users()) { - if (std::find(WorkList.begin(), WorkList.end(), User) != WorkList.end()) + if (is_contained(WorkList, User)) continue; if (CallInst *CI = dyn_cast<CallInst>(User)) { diff --git a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp index ecae27d2233..b01bab2e59c 100644 --- a/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp +++ b/llvm/lib/Target/AMDGPU/R600OptimizeVectorRegisters.cpp @@ -200,12 +200,10 @@ MachineInstr *R600VectorRegMerger::RebuildVector( .addReg(SubReg) .addImm(Chan); UpdatedRegToChan[SubReg] = Chan; - std::vector<unsigned>::iterator ChanPos = - std::find(UpdatedUndef.begin(), UpdatedUndef.end(), Chan); + std::vector<unsigned>::iterator ChanPos = find(UpdatedUndef, Chan); if (ChanPos != UpdatedUndef.end()) UpdatedUndef.erase(ChanPos); - assert(std::find(UpdatedUndef.begin(), UpdatedUndef.end(), Chan) == - UpdatedUndef.end() && + assert(!is_contained(UpdatedUndef, Chan) && "UpdatedUndef shouldn't contain Chan more than once!"); DEBUG(dbgs() << " ->"; Tmp->dump();); (void)Tmp; @@ -236,12 +234,12 @@ void R600VectorRegMerger::RemoveMI(MachineInstr *MI) { for (InstructionSetMap::iterator It = PreviousRegSeqByReg.begin(), E = PreviousRegSeqByReg.end(); It != E; ++It) { std::vector<MachineInstr *> &MIs = (*It).second; - MIs.erase(std::find(MIs.begin(), MIs.end(), MI), MIs.end()); + MIs.erase(find(MIs, MI), MIs.end()); } for (InstructionSetMap::iterator It = PreviousRegSeqByUndefCount.begin(), E = PreviousRegSeqByUndefCount.end(); It != E; ++It) { std::vector<MachineInstr *> &MIs = (*It).second; - MIs.erase(std::find(MIs.begin(), MIs.end(), MI), MIs.end()); + MIs.erase(find(MIs, MI), MIs.end()); } } diff --git a/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp b/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp index b5729fef6ff..032f4c1f7b6 100644 --- a/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp +++ b/llvm/lib/Target/AMDGPU/SIAnnotateControlFlow.cpp @@ -363,7 +363,7 @@ void SIAnnotateControlFlow::closeControlFlow(BasicBlock *BB) { std::vector<BasicBlock*> Preds; for (pred_iterator PI = pred_begin(BB), PE = pred_end(BB); PI != PE; ++PI) { - if (std::find(Latches.begin(), Latches.end(), *PI) == Latches.end()) + if (!is_contained(Latches, *PI)) Preds.push_back(*PI); } BB = llvm::SplitBlockPredecessors(BB, Preds, "endcf.split", DT, LI, false); diff --git a/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp b/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp index 24d675118f8..3b1a9d54f44 100644 --- a/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp +++ b/llvm/lib/Target/AMDGPU/SIMachineScheduler.cpp @@ -479,8 +479,7 @@ void SIScheduleBlock::releaseSuccessors(SUnit *SU, bool InOrOutBlock) { void SIScheduleBlock::nodeScheduled(SUnit *SU) { // Is in TopReadySUs assert (!SU->NumPredsLeft); - std::vector<SUnit*>::iterator I = - std::find(TopReadySUs.begin(), TopReadySUs.end(), SU); + std::vector<SUnit *>::iterator I = find(TopReadySUs, SU); if (I == TopReadySUs.end()) { dbgs() << "Data Structure Bug in SI Scheduler\n"; llvm_unreachable(nullptr); |
