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-rw-r--r--llvm/lib/Target/AMDGPU/VIInstructions.td4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/VIInstructions.td b/llvm/lib/Target/AMDGPU/VIInstructions.td
index 89f0a14ff84..807d461cd9c 100644
--- a/llvm/lib/Target/AMDGPU/VIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/VIInstructions.td
@@ -11,6 +11,8 @@
let SIAssemblerPredicate = DisableInst, SubtargetPredicate = isVI in {
+let DisableSIDecoder = 1 in {
+
//===----------------------------------------------------------------------===//
// VOP1 Instructions
//===----------------------------------------------------------------------===//
@@ -73,6 +75,8 @@ defm V_MIN_I16 : VOP2Inst <vop2<0,0x32>, "v_min_i16", VOP_I16_I16_I16>;
} // End isCommutable = 1
defm V_LDEXP_F16 : VOP2Inst <vop2<0,0x33>, "v_ldexp_f16", VOP_F16_F16_I16>;
+} // let DisableSIDecoder = 1
+
// Aliases to simplify matching of floating-point instructions that
// are VOP2 on SI and VOP3 on VI.
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