1 files changed, 0 insertions, 62 deletions

diff --git a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
index 2d444edd664..e72b7d496ab 100644
--- a/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
+++ b/llvm/lib/Target/AMDGPU/SIShrinkInstructions.cpp
@@ -188,26 +188,6 @@ static bool isKImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) {
   return isInt<16>(Src.getImm()) && !TII->isInlineConstant(Src, 4);
 }
 
-static bool isKUImmOperand(const SIInstrInfo *TII, const MachineOperand &Src) {
-  return isUInt<16>(Src.getImm()) && !TII->isInlineConstant(Src, 4);
-}
-
-static bool isKImmOrKUImmOperand(const SIInstrInfo *TII,
-                                 const MachineOperand &Src,
-                                 bool &IsUnsigned) {
-  if (isInt<16>(Src.getImm())) {
-    IsUnsigned = false;
-    return !TII->isInlineConstant(Src, 4);
-  }
-
-  if (isUInt<16>(Src.getImm())) {
-    IsUnsigned = true;
-    return !TII->isInlineConstant(Src, 4);
-  }
-
-  return false;
-}
-
 /// Copy implicit register operands from specified instruction to this
 /// instruction that are not part of the instruction definition.
 static void copyExtraImplicitOps(MachineInstr &NewMI, MachineFunction &MF,
@@ -222,42 +202,6 @@ static void copyExtraImplicitOps(MachineInstr &NewMI, MachineFunction &MF,
   }
 }
 
-static void shrinkScalarCompare(const SIInstrInfo *TII, MachineInstr &MI) {
-  // cmpk instructions do scc = dst <cc op> imm16, so commute the instruction to
-  // get constants on the RHS.
-  if (!MI.getOperand(0).isReg())
-    TII->commuteInstruction(MI, false, 0, 1);
-
-  const MachineOperand &Src1 = MI.getOperand(1);
-  if (!Src1.isImm())
-    return;
-
-  int SOPKOpc = AMDGPU::getSOPKOp(MI.getOpcode());
-  if (SOPKOpc == -1)
-    return;
-
-  // eq/ne is special because the imm16 can be treated as signed or unsigned.
-  if (SOPKOpc == AMDGPU::S_CMPK_EQ_I32 || SOPKOpc == AMDGPU::S_CMPK_LG_I32) {
-    bool HasUImm;
-    if (isKImmOrKUImmOperand(TII, Src1, HasUImm)) {
-      if (HasUImm) {
-        SOPKOpc = (SOPKOpc == AMDGPU::S_CMPK_EQ_I32) ?
-          AMDGPU::S_CMPK_EQ_U32 : AMDGPU::S_CMPK_LG_U32;
-      }
-
-      MI.setDesc(TII->get(SOPKOpc));
-    }
-
-    return;
-  }
-
-  const MCInstrDesc &NewDesc = TII->get(SOPKOpc);
-  if ((TII->sopkIsZext(SOPKOpc) && isKUImmOperand(TII, Src1)) ||
-      isKImmOperand(TII, Src1)) {
-    MI.setDesc(NewDesc);
-  }
-}
-
 bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
   if (skipFunction(*MF.getFunction()))
     return false;
@@ -366,12 +310,6 @@ bool SIShrinkInstructions::runOnMachineFunction(MachineFunction &MF) {
         }
       }
 
-      // Try to use s_cmpk_*
-      if (MI.isCompare() && TII->isSOPC(MI)) {
-        shrinkScalarCompare(TII, MI);
-        continue;
-      }
-
       // Try to use S_MOVK_I32, which will save 4 bytes for small immediates.
       if (MI.getOpcode() == AMDGPU::S_MOV_B32) {
         const MachineOperand &Src = MI.getOperand(1);