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-rw-r--r--llvm/lib/Target/AMDGPU/SIMachineScheduler.h13
1 files changed, 10 insertions, 3 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIMachineScheduler.h b/llvm/lib/Target/AMDGPU/SIMachineScheduler.h
index 6978b83910d..085ffcdc995 100644
--- a/llvm/lib/Target/AMDGPU/SIMachineScheduler.h
+++ b/llvm/lib/Target/AMDGPU/SIMachineScheduler.h
@@ -54,6 +54,11 @@ struct SISchedulerCandidate {
class SIScheduleDAGMI;
class SIScheduleBlockCreator;
+enum SIScheduleBlockLinkKind {
+ NoData,
+ Data
+};
+
class SIScheduleBlock {
SIScheduleDAGMI *DAG;
SIScheduleBlockCreator *BC;
@@ -92,7 +97,8 @@ class SIScheduleBlock {
unsigned ID;
std::vector<SIScheduleBlock*> Preds; // All blocks predecessors.
- std::vector<SIScheduleBlock*> Succs; // All blocks successors.
+ // All blocks successors, and the kind of link
+ std::vector<std::pair<SIScheduleBlock*, SIScheduleBlockLinkKind>> Succs;
unsigned NumHighLatencySuccessors = 0;
public:
@@ -112,10 +118,11 @@ public:
// Add block pred, which has instruction predecessor of SU.
void addPred(SIScheduleBlock *Pred);
- void addSucc(SIScheduleBlock *Succ);
+ void addSucc(SIScheduleBlock *Succ, SIScheduleBlockLinkKind Kind);
const std::vector<SIScheduleBlock*>& getPreds() const { return Preds; }
- const std::vector<SIScheduleBlock*>& getSuccs() const { return Succs; }
+ ArrayRef<std::pair<SIScheduleBlock*, SIScheduleBlockLinkKind>>
+ getSuccs() const { return Succs; }
unsigned Height; // Maximum topdown path length to block without outputs
unsigned Depth; // Maximum bottomup path length to block without inputs
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