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Diffstat (limited to 'llvm/lib/MC/MCSubtargetInfo.cpp')
-rw-r--r--llvm/lib/MC/MCSubtargetInfo.cpp11
1 files changed, 5 insertions, 6 deletions
diff --git a/llvm/lib/MC/MCSubtargetInfo.cpp b/llvm/lib/MC/MCSubtargetInfo.cpp
index ece775c4f08..414512a3a2c 100644
--- a/llvm/lib/MC/MCSubtargetInfo.cpp
+++ b/llvm/lib/MC/MCSubtargetInfo.cpp
@@ -29,9 +29,9 @@ MCSubtargetInfo::InitMCProcessorInfo(StringRef CPU, StringRef FS) {
void
MCSubtargetInfo::InitCPUSchedModel(StringRef CPU) {
if (!CPU.empty())
- CPUSchedModel = getSchedModelForCPU(CPU);
+ CPUSchedModel = &getSchedModelForCPU(CPU);
else
- CPUSchedModel = MCSchedModel::GetDefaultSchedModel();
+ CPUSchedModel = &MCSchedModel::GetDefaultSchedModel();
}
void MCSubtargetInfo::InitMCSubtargetInfo(
@@ -82,8 +82,7 @@ FeatureBitset MCSubtargetInfo::ApplyFeatureFlag(StringRef FS) {
return FeatureBits;
}
-MCSchedModel
-MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
+const MCSchedModel &MCSubtargetInfo::getSchedModelForCPU(StringRef CPU) const {
assert(ProcSchedModels && "Processor machine model not available!");
unsigned NumProcs = ProcDesc.size();
@@ -116,6 +115,6 @@ MCSubtargetInfo::getInstrItineraryForCPU(StringRef CPU) const {
/// Initialize an InstrItineraryData instance.
void MCSubtargetInfo::initInstrItins(InstrItineraryData &InstrItins) const {
- InstrItins =
- InstrItineraryData(CPUSchedModel, Stages, OperandCycles, ForwardingPaths);
+ InstrItins = InstrItineraryData(getSchedModel(), Stages, OperandCycles,
+ ForwardingPaths);
}
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