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-rw-r--r--llvm/lib/CodeGen/MachineFunction.cpp13
-rw-r--r--llvm/lib/CodeGen/MachineRegisterInfo.cpp3
2 files changed, 7 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/MachineFunction.cpp b/llvm/lib/CodeGen/MachineFunction.cpp
index 8c987ba216a..da6b778cc6c 100644
--- a/llvm/lib/CodeGen/MachineFunction.cpp
+++ b/llvm/lib/CodeGen/MachineFunction.cpp
@@ -63,6 +63,9 @@ void MachineFunctionProperties::print(raw_ostream &ROS) const {
case Property::IsSSA:
ROS << (HasProperty ? "SSA, " : "Post SSA, ");
break;
+ case Property::TracksLiveness:
+ ROS << (HasProperty ? "" : "not ") << "tracking liveness, ";
+ break;
case Property::AllVRegsAllocated:
ROS << (HasProperty ? "AllVRegsAllocated" : "HasVRegs");
break;
@@ -95,8 +98,9 @@ MachineFunction::MachineFunction(const Function *F, const TargetMachine &TM,
unsigned FunctionNum, MachineModuleInfo &mmi)
: Fn(F), Target(TM), STI(TM.getSubtargetImpl(*F)), Ctx(mmi.getContext()),
MMI(mmi) {
- // Assume the function starts in SSA form.
+ // Assume the function starts in SSA form with correct liveness.
Properties.set(MachineFunctionProperties::Property::IsSSA);
+ Properties.set(MachineFunctionProperties::Property::TracksLiveness);
if (STI->getRegisterInfo())
RegInfo = new (Allocator) MachineRegisterInfo(this);
else
@@ -404,12 +408,7 @@ void MachineFunction::print(raw_ostream &OS, SlotIndexes *Indexes) const {
OS << "# Machine code for function " << getName() << ": ";
OS << "Properties: <";
getProperties().print(OS);
- OS << "> : ";
- if (RegInfo) {
- if (!RegInfo->tracksLiveness())
- OS << "not tracking liveness";
- }
- OS << '\n';
+ OS << ">\n";
// Print Frame Information
FrameInfo->print(*this, OS);
diff --git a/llvm/lib/CodeGen/MachineRegisterInfo.cpp b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
index 93fd52ea117..de2f3b46d3c 100644
--- a/llvm/lib/CodeGen/MachineRegisterInfo.cpp
+++ b/llvm/lib/CodeGen/MachineRegisterInfo.cpp
@@ -25,8 +25,7 @@ using namespace llvm;
void MachineRegisterInfo::Delegate::anchor() {}
MachineRegisterInfo::MachineRegisterInfo(MachineFunction *MF)
- : MF(MF), TheDelegate(nullptr), TracksLiveness(true),
- TracksSubRegLiveness(false) {
+ : MF(MF), TheDelegate(nullptr), TracksSubRegLiveness(false) {
unsigned NumRegs = getTargetRegisterInfo()->getNumRegs();
VRegInfo.reserve(256);
RegAllocHints.reserve(256);
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