diff options
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp | 24 | ||||
-rw-r--r-- | llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h | 6 | ||||
-rw-r--r-- | llvm/lib/CodeGen/TargetLoweringBase.cpp | 6 |
3 files changed, 0 insertions, 36 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp index 05010ecf7e1..2c3c0eb101a 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp @@ -1168,30 +1168,6 @@ SDValue SelectionDAGBuilder::getValueImpl(const Value *V) { llvm_unreachable("Can't get register for value!"); } -void SelectionDAGBuilder::visitCleanupRet(const CleanupReturnInst &I) { - report_fatal_error("visitCleanupRet not yet implemented!"); -} - -void SelectionDAGBuilder::visitCatchEndBlock(const CatchEndBlockInst &I) { - report_fatal_error("visitCatchEndBlock not yet implemented!"); -} - -void SelectionDAGBuilder::visitCatchRet(const CatchReturnInst &I) { - report_fatal_error("visitCatchRet not yet implemented!"); -} - -void SelectionDAGBuilder::visitCatchBlock(const CatchBlockInst &I) { - report_fatal_error("visitCatchBlock not yet implemented!"); -} - -void SelectionDAGBuilder::visitTerminateBlock(const TerminateBlockInst &TBI) { - report_fatal_error("visitTerminateBlock not yet implemented!"); -} - -void SelectionDAGBuilder::visitCleanupBlock(const CleanupBlockInst &TBI) { - report_fatal_error("visitCleanupBlock not yet implemented!"); -} - void SelectionDAGBuilder::visitRet(const ReturnInst &I) { const TargetLowering &TLI = DAG.getTargetLoweringInfo(); auto &DL = DAG.getDataLayout(); diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h index df85e233b79..700675453fe 100644 --- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h +++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.h @@ -734,12 +734,6 @@ private: void visitSwitch(const SwitchInst &I); void visitIndirectBr(const IndirectBrInst &I); void visitUnreachable(const UnreachableInst &I); - void visitCleanupRet(const CleanupReturnInst &I); - void visitCatchEndBlock(const CatchEndBlockInst &I); - void visitCatchRet(const CatchReturnInst &I); - void visitCatchBlock(const CatchBlockInst &I); - void visitTerminateBlock(const TerminateBlockInst &TBI); - void visitCleanupBlock(const CleanupBlockInst &CBI); uint32_t getEdgeWeight(const MachineBasicBlock *Src, const MachineBasicBlock *Dst) const; diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp index b8ddcfe01b7..ecfd6593157 100644 --- a/llvm/lib/CodeGen/TargetLoweringBase.cpp +++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp @@ -1546,12 +1546,6 @@ int TargetLoweringBase::InstructionOpcodeToISD(unsigned Opcode) const { case Invoke: return 0; case Resume: return 0; case Unreachable: return 0; - case CleanupRet: return 0; - case CatchEndBlock: return 0; - case CatchRet: return 0; - case CatchBlock: return 0; - case TerminateBlock: return 0; - case CleanupBlock: return 0; case Add: return ISD::ADD; case FAdd: return ISD::FADD; case Sub: return ISD::SUB; |