diff options
Diffstat (limited to 'llvm/lib/CodeGen')
-rw-r--r-- | llvm/lib/CodeGen/ExecutionDepsFix.cpp | 2 | ||||
-rw-r--r-- | llvm/lib/CodeGen/IfConversion.cpp | 12 | ||||
-rw-r--r-- | llvm/lib/CodeGen/LivePhysRegs.cpp | 16 | ||||
-rw-r--r-- | llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp | 2 |
4 files changed, 16 insertions, 16 deletions
diff --git a/llvm/lib/CodeGen/ExecutionDepsFix.cpp b/llvm/lib/CodeGen/ExecutionDepsFix.cpp index 12ea9e3844b..7555f403aae 100644 --- a/llvm/lib/CodeGen/ExecutionDepsFix.cpp +++ b/llvm/lib/CodeGen/ExecutionDepsFix.cpp @@ -560,7 +560,7 @@ void ExeDepsFix::processUndefReads(MachineBasicBlock *MBB) { LiveRegSet.init(TRI); // We do not need to care about pristine registers as they are just preserved // but not actually used in the function. - LiveRegSet.addLiveOutsNoPristines(MBB); + LiveRegSet.addLiveOutsNoPristines(*MBB); MachineInstr *UndefMI = UndefReads.back().first; unsigned OpIdx = UndefReads.back().second; diff --git a/llvm/lib/CodeGen/IfConversion.cpp b/llvm/lib/CodeGen/IfConversion.cpp index ba2fa4ce1f1..8ac5a397e65 100644 --- a/llvm/lib/CodeGen/IfConversion.cpp +++ b/llvm/lib/CodeGen/IfConversion.cpp @@ -1136,13 +1136,13 @@ bool IfConverter::IfConvertSimple(BBInfo &BBI, IfcvtKind Kind) { // Initialize liveins to the first BB. These are potentiall redefined by // predicated instructions. Redefs.init(TRI); - Redefs.addLiveIns(CvtBBI->BB); - Redefs.addLiveIns(NextBBI->BB); + Redefs.addLiveIns(*CvtBBI->BB); + Redefs.addLiveIns(*NextBBI->BB); // Compute a set of registers which must not be killed by instructions in // BB1: This is everything live-in to BB2. DontKill.init(TRI); - DontKill.addLiveIns(NextBBI->BB); + DontKill.addLiveIns(*NextBBI->BB); if (CvtBBI->BB->pred_size() > 1) { BBI.NonPredSize -= TII->RemoveBranch(*BBI.BB); @@ -1241,8 +1241,8 @@ bool IfConverter::IfConvertTriangle(BBInfo &BBI, IfcvtKind Kind) { // Initialize liveins to the first BB. These are potentially redefined by // predicated instructions. Redefs.init(TRI); - Redefs.addLiveIns(CvtBBI->BB); - Redefs.addLiveIns(NextBBI->BB); + Redefs.addLiveIns(*CvtBBI->BB); + Redefs.addLiveIns(*NextBBI->BB); DontKill.clear(); @@ -1396,7 +1396,7 @@ bool IfConverter::IfConvertDiamond(BBInfo &BBI, IfcvtKind Kind, // Initialize liveins to the first BB. These are potentially redefined by // predicated instructions. Redefs.init(TRI); - Redefs.addLiveIns(BBI1->BB); + Redefs.addLiveIns(*BBI1->BB); // Remove the duplicated instructions at the beginnings of both paths. // Skip dbg_value instructions diff --git a/llvm/lib/CodeGen/LivePhysRegs.cpp b/llvm/lib/CodeGen/LivePhysRegs.cpp index 4945b3d216c..eb2955045fd 100644 --- a/llvm/lib/CodeGen/LivePhysRegs.cpp +++ b/llvm/lib/CodeGen/LivePhysRegs.cpp @@ -143,18 +143,18 @@ static void addPristines(LivePhysRegs &LiveRegs, const MachineFunction &MF, LiveRegs.removeReg(Info.getReg()); } -void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock *MBB) { +void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) { // To get the live-outs we simply merge the live-ins of all successors. - for (const MachineBasicBlock *Succ : MBB->successors()) + for (const MachineBasicBlock *Succ : MBB.successors()) ::addLiveIns(*this, *Succ); } -void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB) { - const MachineFunction &MF = *MBB->getParent(); +void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) { + const MachineFunction &MF = *MBB.getParent(); const MachineFrameInfo &MFI = *MF.getFrameInfo(); if (MFI.isCalleeSavedInfoValid()) { addPristines(*this, MF, MFI, *TRI); - if (MBB->isReturnBlock()) { + if (MBB.isReturnBlock()) { // The return block has no successors whose live-ins we could merge // below. So instead we add the callee saved registers manually. for (const MCPhysReg *I = TRI->getCalleeSavedRegs(&MF); *I; ++I) @@ -165,10 +165,10 @@ void LivePhysRegs::addLiveOuts(const MachineBasicBlock *MBB) { addLiveOutsNoPristines(MBB); } -void LivePhysRegs::addLiveIns(const MachineBasicBlock *MBB) { - const MachineFunction &MF = *MBB->getParent(); +void LivePhysRegs::addLiveIns(const MachineBasicBlock &MBB) { + const MachineFunction &MF = *MBB.getParent(); const MachineFrameInfo &MFI = *MF.getFrameInfo(); if (MFI.isCalleeSavedInfoValid()) addPristines(*this, MF, MFI, *TRI); - ::addLiveIns(*this, *MBB); + ::addLiveIns(*this, MBB); } diff --git a/llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp b/llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp index 0d09c2375dc..87e4eb66c9c 100644 --- a/llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp +++ b/llvm/lib/CodeGen/StackMapLivenessAnalysis.cpp @@ -128,7 +128,7 @@ bool StackMapLiveness::calculateLiveness(MachineFunction &MF) { DEBUG(dbgs() << "****** BB " << MBB.getName() << " ******\n"); LiveRegs.init(TRI); // FIXME: This should probably be addLiveOuts(). - LiveRegs.addLiveOutsNoPristines(&MBB); + LiveRegs.addLiveOutsNoPristines(MBB); bool HasStackMap = false; // Reverse iterate over all instructions and add the current live register // set to an instruction if we encounter a patchpoint instruction. |