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-rw-r--r--llvm/lib/CodeGen/MIRParser/MIParser.cpp6
-rw-r--r--llvm/lib/CodeGen/MIRPrinter.cpp3
-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp9
-rw-r--r--llvm/lib/CodeGen/MachineOperand.cpp16
-rw-r--r--llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp3
5 files changed, 17 insertions, 20 deletions
diff --git a/llvm/lib/CodeGen/MIRParser/MIParser.cpp b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
index 0f2648e2bfa..11cab488e22 100644
--- a/llvm/lib/CodeGen/MIRParser/MIParser.cpp
+++ b/llvm/lib/CodeGen/MIRParser/MIParser.cpp
@@ -2619,7 +2619,8 @@ bool MIParser::parseMachineOperand(const unsigned OpCode, const unsigned OpIdx,
} else
return parseTypedImmediateOperand(Dest);
case MIToken::dot: {
- if (const auto *Formatter = MF.getTarget().getMIRFormatter()) {
+ const auto *TII = MF.getSubtarget().getInstrInfo();
+ if (const auto *Formatter = TII->getMIRFormatter()) {
return parseTargetImmMnemonic(OpCode, OpIdx, Dest, *Formatter);
}
LLVM_FALLTHROUGH;
@@ -2879,7 +2880,8 @@ bool MIParser::parseMemoryPseudoSourceValue(const PseudoSourceValue *&PSV) {
break;
case MIToken::kw_custom: {
lex();
- if (const auto *Formatter = MF.getTarget().getMIRFormatter()) {
+ const auto *TII = MF.getSubtarget().getInstrInfo();
+ if (const auto *Formatter = TII->getMIRFormatter()) {
if (Formatter->parseCustomPseudoSourceValue(
Token.stringValue(), MF, PFS, PSV,
[this](StringRef::iterator Loc, const Twine &Msg) -> bool {
diff --git a/llvm/lib/CodeGen/MIRPrinter.cpp b/llvm/lib/CodeGen/MIRPrinter.cpp
index 9d9c12a9591..1d61fdbba4d 100644
--- a/llvm/lib/CodeGen/MIRPrinter.cpp
+++ b/llvm/lib/CodeGen/MIRPrinter.cpp
@@ -709,7 +709,6 @@ void MIPrinter::print(const MachineInstr &MI) {
const auto *TRI = SubTarget.getRegisterInfo();
assert(TRI && "Expected target register info");
const auto *TII = SubTarget.getInstrInfo();
- const auto *MIRF = MF->getTarget().getMIRFormatter();
assert(TII && "Expected target instruction info");
if (MI.isCFIInstruction())
assert(MI.getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
@@ -808,7 +807,7 @@ void MIPrinter::print(const MachineInstr &MI) {
for (const auto *Op : MI.memoperands()) {
if (NeedComma)
OS << ", ";
- Op->print(OS, MST, SSNs, Context, &MFI, TII, MIRF);
+ Op->print(OS, MST, SSNs, Context, &MFI, TII);
NeedComma = true;
}
}
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 177fef80e2e..d3803b31f5c 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -89,15 +89,13 @@ static void tryToGetTargetInfo(const MachineInstr &MI,
const TargetRegisterInfo *&TRI,
const MachineRegisterInfo *&MRI,
const TargetIntrinsicInfo *&IntrinsicInfo,
- const TargetInstrInfo *&TII,
- const MIRFormatter *&MIRF) {
+ const TargetInstrInfo *&TII) {
if (const MachineFunction *MF = getMFIfAvailable(MI)) {
TRI = MF->getSubtarget().getRegisterInfo();
MRI = &MF->getRegInfo();
IntrinsicInfo = MF->getTarget().getIntrinsicInfo();
TII = MF->getSubtarget().getInstrInfo();
- MIRF = MF->getTarget().getMIRFormatter();
}
}
@@ -1479,8 +1477,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
const TargetRegisterInfo *TRI = nullptr;
const MachineRegisterInfo *MRI = nullptr;
const TargetIntrinsicInfo *IntrinsicInfo = nullptr;
- const MIRFormatter *MIRF = nullptr;
- tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII, MIRF);
+ tryToGetTargetInfo(*this, TRI, MRI, IntrinsicInfo, TII);
if (isCFIInstruction())
assert(getNumOperands() == 1 && "Expected 1 operand in CFI instruction");
@@ -1740,7 +1737,7 @@ void MachineInstr::print(raw_ostream &OS, ModuleSlotTracker &MST,
for (const MachineMemOperand *Op : memoperands()) {
if (NeedComma)
OS << ", ";
- Op->print(OS, MST, SSNs, *Context, MFI, TII, MIRF);
+ Op->print(OS, MST, SSNs, *Context, MFI, TII);
NeedComma = true;
}
}
diff --git a/llvm/lib/CodeGen/MachineOperand.cpp b/llvm/lib/CodeGen/MachineOperand.cpp
index 5dd98467ba6..0ea495bf0c0 100644
--- a/llvm/lib/CodeGen/MachineOperand.cpp
+++ b/llvm/lib/CodeGen/MachineOperand.cpp
@@ -784,8 +784,11 @@ void MachineOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
}
case MachineOperand::MO_Immediate: {
const MIRFormatter *Formatter = nullptr;
- if (const MachineFunction *MF = getMFIfAvailable(*this))
- Formatter = MF->getTarget().getMIRFormatter();
+ if (const MachineFunction *MF = getMFIfAvailable(*this)) {
+ const auto *TII = MF->getSubtarget().getInstrInfo();
+ assert(TII && "expected instruction info");
+ Formatter = TII->getMIRFormatter();
+ }
if (Formatter)
Formatter->printImm(OS, *getParent(), OpIdx, getImm());
else
@@ -1057,8 +1060,7 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
SmallVectorImpl<StringRef> &SSNs,
const LLVMContext &Context,
const MachineFrameInfo *MFI,
- const TargetInstrInfo *TII,
- const MIRFormatter* MIRF) const {
+ const TargetInstrInfo *TII) const {
OS << '(';
if (isVolatile())
OS << "volatile ";
@@ -1133,15 +1135,13 @@ void MachineMemOperand::print(raw_ostream &OS, ModuleSlotTracker &MST,
OS, cast<ExternalSymbolPseudoSourceValue>(PVal)->getSymbol());
break;
default: {
+ const MIRFormatter *Formatter = TII->getMIRFormatter();
// FIXME: This is not necessarily the correct MIR serialization format for
// a custom pseudo source value, but at least it allows
// -print-machineinstrs to work on a target with custom pseudo source
// values.
OS << "custom \"";
- if (MIRF)
- MIRF->printCustomPseudoSourceValue(OS, MST, *PVal);
- else
- PVal->printCustom(OS);
+ Formatter->printCustomPseudoSourceValue(OS, MST, *PVal);
OS << '\"';
break;
}
diff --git a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
index cbdcb93e60c..6fd71393bf3 100644
--- a/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/SelectionDAGDumper.cpp
@@ -480,8 +480,7 @@ static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
if (MF)
MST.incorporateFunction(MF->getFunction());
SmallVector<StringRef, 0> SSNs;
- MMO.print(OS, MST, SSNs, Ctx, MFI, TII,
- MF ? MF->getTarget().getMIRFormatter() : nullptr);
+ MMO.print(OS, MST, SSNs, Ctx, MFI, TII);
}
static void printMemOperand(raw_ostream &OS, const MachineMemOperand &MMO,
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