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-rw-r--r--llvm/lib/CodeGen/MachineInstr.cpp4
-rw-r--r--llvm/lib/CodeGen/RegAllocSimple.cpp11
-rw-r--r--llvm/lib/CodeGen/TwoAddressInstructionPass.cpp23
3 files changed, 18 insertions, 20 deletions
diff --git a/llvm/lib/CodeGen/MachineInstr.cpp b/llvm/lib/CodeGen/MachineInstr.cpp
index 7da1dcae5c7..b6e6011b603 100644
--- a/llvm/lib/CodeGen/MachineInstr.cpp
+++ b/llvm/lib/CodeGen/MachineInstr.cpp
@@ -17,8 +17,8 @@
#include "llvm/Target/TargetInstrInfo.h"
#include "llvm/Target/MRegisterInfo.h"
#include "llvm/Support/LeakDetector.h"
+#include "llvm/Support/Streams.h"
#include <iostream>
-
using namespace llvm;
// Global variable holding an array of descriptors for machine instructions.
@@ -175,7 +175,7 @@ bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
}
void MachineInstr::dump() const {
- std::cerr << " " << *this;
+ llvm_cerr << " " << *this;
}
static inline void OutputReg(std::ostream &os, unsigned RegNo,
diff --git a/llvm/lib/CodeGen/RegAllocSimple.cpp b/llvm/lib/CodeGen/RegAllocSimple.cpp
index 088be47e14d..f08b039b82e 100644
--- a/llvm/lib/CodeGen/RegAllocSimple.cpp
+++ b/llvm/lib/CodeGen/RegAllocSimple.cpp
@@ -190,9 +190,9 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
if (op.isRegister() && op.getReg() &&
MRegisterInfo::isVirtualRegister(op.getReg())) {
unsigned virtualReg = (unsigned) op.getReg();
- DEBUG(std::cerr << "op: " << op << "\n");
- DEBUG(std::cerr << "\t inst[" << i << "]: ";
- MI->print(std::cerr, TM));
+ DOUT << "op: " << op << "\n";
+ DOUT << "\t inst[" << i << "]: ";
+ DEBUG(MI->print(std::cerr, TM));
// make sure the same virtual register maps to the same physical
// register in any given instruction
@@ -221,8 +221,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
}
}
MI->getOperand(i).setReg(physReg);
- DEBUG(std::cerr << "virt: " << virtualReg <<
- ", phys: " << op.getReg() << "\n");
+ DOUT << "virt: " << virtualReg << ", phys: " << op.getReg() << "\n";
}
}
RegClassIdx.clear();
@@ -234,7 +233,7 @@ void RegAllocSimple::AllocateBasicBlock(MachineBasicBlock &MBB) {
/// runOnMachineFunction - Register allocate the whole function
///
bool RegAllocSimple::runOnMachineFunction(MachineFunction &Fn) {
- DEBUG(std::cerr << "Machine Function " << "\n");
+ DOUT << "Machine Function\n";
MF = &Fn;
TM = &MF->getTarget();
RegInfo = TM->getRegisterInfo();
diff --git a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
index dbc50d6b130..b81ced283b6 100644
--- a/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ b/llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -77,7 +77,7 @@ void TwoAddressInstructionPass::getAnalysisUsage(AnalysisUsage &AU) const {
/// operands.
///
bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
- DEBUG(std::cerr << "Machine Function\n");
+ DOUT << "Machine Function\n";
const TargetMachine &TM = MF.getTarget();
const MRegisterInfo &MRI = *TM.getRegisterInfo();
const TargetInstrInfo &TII = *TM.getInstrInfo();
@@ -85,9 +85,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
bool MadeChange = false;
- DEBUG(std::cerr << "********** REWRITING TWO-ADDR INSTRS **********\n");
- DEBUG(std::cerr << "********** Function: "
- << MF.getFunction()->getName() << '\n');
+ DOUT << "********** REWRITING TWO-ADDR INSTRS **********\n";
+ DOUT << "********** Function: " << MF.getFunction()->getName() << '\n';
for (MachineFunction::iterator mbbi = MF.begin(), mbbe = MF.end();
mbbi != mbbe; ++mbbi) {
@@ -103,7 +102,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
if (FirstTied) {
++NumTwoAddressInstrs;
- DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM));
+ DOUT << '\t'; DEBUG(mi->print(std::cerr, &TM));
}
FirstTied = false;
@@ -151,12 +150,12 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
"Not a proper commutative instruction!");
unsigned regC = mi->getOperand(3-si).getReg();
if (LV.KillsRegister(mi, regC)) {
- DEBUG(std::cerr << "2addr: COMMUTING : " << *mi);
+ DOUT << "2addr: COMMUTING : " << *mi;
MachineInstr *NewMI = TII.commuteInstruction(mi);
if (NewMI == 0) {
- DEBUG(std::cerr << "2addr: COMMUTING FAILED!\n");
+ DOUT << "2addr: COMMUTING FAILED!\n";
} else {
- DEBUG(std::cerr << "2addr: COMMUTED TO: " << *NewMI);
+ DOUT << "2addr: COMMUTED TO: " << *NewMI;
// If the instruction changed to commute it, update livevar.
if (NewMI != mi) {
LV.instructionChanged(mi, NewMI); // Update live variables
@@ -184,8 +183,8 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
#endif
if (MachineInstr *New = TII.convertToThreeAddress(mi)) {
- DEBUG(std::cerr << "2addr: CONVERTING 2-ADDR: " << *mi);
- DEBUG(std::cerr << "2addr: TO 3-ADDR: " << *New);
+ DOUT << "2addr: CONVERTING 2-ADDR: " << *mi;
+ DOUT << "2addr: TO 3-ADDR: " << *New;
LV.instructionChanged(mi, New); // Update live variables
mbbi->insert(mi, New); // Insert the new inst
mbbi->erase(mi); // Nuke the old inst.
@@ -201,7 +200,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
MRI.copyRegToReg(*mbbi, mi, regA, regB, rc);
MachineBasicBlock::iterator prevMi = prior(mi);
- DEBUG(std::cerr << "\t\tprepend:\t"; prevMi->print(std::cerr, &TM));
+ DOUT << "\t\tprepend:\t"; DEBUG(prevMi->print(std::cerr, &TM));
// Update live variables for regA
LiveVariables::VarInfo& varInfo = LV.getVarInfo(regA);
@@ -226,7 +225,7 @@ bool TwoAddressInstructionPass::runOnMachineFunction(MachineFunction &MF) {
mi->getOperand(ti).setReg(mi->getOperand(si).getReg());
MadeChange = true;
- DEBUG(std::cerr << "\t\trewrite to:\t"; mi->print(std::cerr, &TM));
+ DOUT << "\t\trewrite to:\t"; DEBUG(mi->print(std::cerr, &TM));
}
}
}
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