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-rw-r--r--llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp3
1 files changed, 1 insertions, 2 deletions
diff --git a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
index a68980a9626..81bb73bf28e 100644
--- a/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
@@ -9825,8 +9825,7 @@ SDValue DAGCombiner::visitTRUNCATE(SDNode *N) {
// because targets may prefer a wider type during later combines and invert
// this transform.
switch (N0.getOpcode()) {
- // TODO: Add case for ADD - that will likely require a change in logic here
- // or target-specific changes to avoid regressions.
+ case ISD::ADD:
case ISD::SUB:
case ISD::MUL:
case ISD::AND:
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