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-rw-r--r--llvm/lib/CodeGen/BasicTargetTransformInfo.cpp87
-rw-r--r--llvm/lib/CodeGen/MachineScheduler.cpp42
2 files changed, 63 insertions, 66 deletions
diff --git a/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp b/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
index 02cc31b6d2b..e3ecf14d1f2 100644
--- a/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
+++ b/llvm/lib/CodeGen/BasicTargetTransformInfo.cpp
@@ -43,11 +43,11 @@ public:
initializeBasicTTIPass(*PassRegistry::getPassRegistry());
}
- virtual void initializePass() override {
+ void initializePass() override {
pushTTIStack(this);
}
- virtual void getAnalysisUsage(AnalysisUsage &AU) const override {
+ void getAnalysisUsage(AnalysisUsage &AU) const override {
TargetTransformInfo::getAnalysisUsage(AU);
}
@@ -55,64 +55,61 @@ public:
static char ID;
/// Provide necessary pointer adjustments for the two base classes.
- virtual void *getAdjustedAnalysisPointer(const void *ID) override {
+ void *getAdjustedAnalysisPointer(const void *ID) override {
if (ID == &TargetTransformInfo::ID)
return (TargetTransformInfo*)this;
return this;
}
- virtual bool hasBranchDivergence() const override;
+ bool hasBranchDivergence() const override;
/// \name Scalar TTI Implementations
/// @{
- virtual bool isLegalAddImmediate(int64_t imm) const override;
- virtual bool isLegalICmpImmediate(int64_t imm) const override;
- virtual bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
- int64_t BaseOffset, bool HasBaseReg,
- int64_t Scale) const override;
- virtual int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
- int64_t BaseOffset, bool HasBaseReg,
- int64_t Scale) const override;
- virtual bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
- virtual bool isTypeLegal(Type *Ty) const override;
- virtual unsigned getJumpBufAlignment() const override;
- virtual unsigned getJumpBufSize() const override;
- virtual bool shouldBuildLookupTables() const override;
- virtual bool haveFastSqrt(Type *Ty) const override;
- virtual void getUnrollingPreferences(
- Loop *L, UnrollingPreferences &UP) const override;
+ bool isLegalAddImmediate(int64_t imm) const override;
+ bool isLegalICmpImmediate(int64_t imm) const override;
+ bool isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
+ int64_t BaseOffset, bool HasBaseReg,
+ int64_t Scale) const override;
+ int getScalingFactorCost(Type *Ty, GlobalValue *BaseGV,
+ int64_t BaseOffset, bool HasBaseReg,
+ int64_t Scale) const override;
+ bool isTruncateFree(Type *Ty1, Type *Ty2) const override;
+ bool isTypeLegal(Type *Ty) const override;
+ unsigned getJumpBufAlignment() const override;
+ unsigned getJumpBufSize() const override;
+ bool shouldBuildLookupTables() const override;
+ bool haveFastSqrt(Type *Ty) const override;
+ void getUnrollingPreferences(Loop *L,
+ UnrollingPreferences &UP) const override;
/// @}
/// \name Vector TTI Implementations
/// @{
- virtual unsigned getNumberOfRegisters(bool Vector) const override;
- virtual unsigned getMaximumUnrollFactor() const override;
- virtual unsigned getRegisterBitWidth(bool Vector) const override;
- virtual unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty,
- OperandValueKind,
- OperandValueKind) const override;
- virtual unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
- int Index, Type *SubTp) const override;
- virtual unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
- Type *Src) const override;
- virtual unsigned getCFInstrCost(unsigned Opcode) const override;
- virtual unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
- Type *CondTy) const override;
- virtual unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
- unsigned Index) const override;
- virtual unsigned getMemoryOpCost(unsigned Opcode, Type *Src,
- unsigned Alignment,
- unsigned AddressSpace) const override;
- virtual unsigned getIntrinsicInstrCost(
- Intrinsic::ID, Type *RetTy, ArrayRef<Type*> Tys) const override;
- virtual unsigned getNumberOfParts(Type *Tp) const override;
- virtual unsigned getAddressComputationCost(
- Type *Ty, bool IsComplex) const override;
- virtual unsigned getReductionCost(unsigned Opcode, Type *Ty,
- bool IsPairwise) const override;
+ unsigned getNumberOfRegisters(bool Vector) const override;
+ unsigned getMaximumUnrollFactor() const override;
+ unsigned getRegisterBitWidth(bool Vector) const override;
+ unsigned getArithmeticInstrCost(unsigned Opcode, Type *Ty, OperandValueKind,
+ OperandValueKind) const override;
+ unsigned getShuffleCost(ShuffleKind Kind, Type *Tp,
+ int Index, Type *SubTp) const override;
+ unsigned getCastInstrCost(unsigned Opcode, Type *Dst,
+ Type *Src) const override;
+ unsigned getCFInstrCost(unsigned Opcode) const override;
+ unsigned getCmpSelInstrCost(unsigned Opcode, Type *ValTy,
+ Type *CondTy) const override;
+ unsigned getVectorInstrCost(unsigned Opcode, Type *Val,
+ unsigned Index) const override;
+ unsigned getMemoryOpCost(unsigned Opcode, Type *Src, unsigned Alignment,
+ unsigned AddressSpace) const override;
+ unsigned getIntrinsicInstrCost(Intrinsic::ID, Type *RetTy,
+ ArrayRef<Type*> Tys) const override;
+ unsigned getNumberOfParts(Type *Tp) const override;
+ unsigned getAddressComputationCost( Type *Ty, bool IsComplex) const override;
+ unsigned getReductionCost(unsigned Opcode, Type *Ty,
+ bool IsPairwise) const override;
/// @}
};
diff --git a/llvm/lib/CodeGen/MachineScheduler.cpp b/llvm/lib/CodeGen/MachineScheduler.cpp
index a7b3d5e3376..f99fc72e75b 100644
--- a/llvm/lib/CodeGen/MachineScheduler.cpp
+++ b/llvm/lib/CodeGen/MachineScheduler.cpp
@@ -2444,29 +2444,29 @@ public:
GenericSchedulerBase(C), DAG(0), Top(SchedBoundary::TopQID, "TopQ"),
Bot(SchedBoundary::BotQID, "BotQ") {}
- virtual void initPolicy(MachineBasicBlock::iterator Begin,
- MachineBasicBlock::iterator End,
- unsigned NumRegionInstrs) override;
+ void initPolicy(MachineBasicBlock::iterator Begin,
+ MachineBasicBlock::iterator End,
+ unsigned NumRegionInstrs) override;
- virtual bool shouldTrackPressure() const override {
+ bool shouldTrackPressure() const override {
return RegionPolicy.ShouldTrackPressure;
}
- virtual void initialize(ScheduleDAGMI *dag) override;
+ void initialize(ScheduleDAGMI *dag) override;
- virtual SUnit *pickNode(bool &IsTopNode) override;
+ SUnit *pickNode(bool &IsTopNode) override;
- virtual void schedNode(SUnit *SU, bool IsTopNode) override;
+ void schedNode(SUnit *SU, bool IsTopNode) override;
- virtual void releaseTopNode(SUnit *SU) override {
+ void releaseTopNode(SUnit *SU) override {
Top.releaseTopNode(SU);
}
- virtual void releaseBottomNode(SUnit *SU) override {
+ void releaseBottomNode(SUnit *SU) override {
Bot.releaseBottomNode(SU);
}
- virtual void registerRoots() override;
+ void registerRoots() override;
protected:
void checkAcyclicLatency();
@@ -3037,16 +3037,16 @@ public:
virtual ~PostGenericScheduler() {}
- virtual void initPolicy(MachineBasicBlock::iterator Begin,
- MachineBasicBlock::iterator End,
- unsigned NumRegionInstrs) override {
+ void initPolicy(MachineBasicBlock::iterator Begin,
+ MachineBasicBlock::iterator End,
+ unsigned NumRegionInstrs) override {
/* no configurable policy */
};
/// PostRA scheduling does not track pressure.
- virtual bool shouldTrackPressure() const override { return false; }
+ bool shouldTrackPressure() const override { return false; }
- virtual void initialize(ScheduleDAGMI *Dag) override {
+ void initialize(ScheduleDAGMI *Dag) override {
DAG = Dag;
SchedModel = DAG->getSchedModel();
TRI = DAG->TRI;
@@ -3065,22 +3065,22 @@ public:
}
}
- virtual void registerRoots() override;
+ void registerRoots() override;
- virtual SUnit *pickNode(bool &IsTopNode) override;
+ SUnit *pickNode(bool &IsTopNode) override;
- virtual void scheduleTree(unsigned SubtreeID) override {
+ void scheduleTree(unsigned SubtreeID) override {
llvm_unreachable("PostRA scheduler does not support subtree analysis.");
}
- virtual void schedNode(SUnit *SU, bool IsTopNode) override;
+ void schedNode(SUnit *SU, bool IsTopNode) override;
- virtual void releaseTopNode(SUnit *SU) override {
+ void releaseTopNode(SUnit *SU) override {
Top.releaseTopNode(SU);
}
// Only called for roots.
- virtual void releaseBottomNode(SUnit *SU) override {
+ void releaseBottomNode(SUnit *SU) override {
BotRoots.push_back(SU);
}
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