summaryrefslogtreecommitdiffstats
path: root/llvm/lib/CodeGen/TargetPassConfig.cpp
diff options
context:
space:
mode:
Diffstat (limited to 'llvm/lib/CodeGen/TargetPassConfig.cpp')
-rw-r--r--llvm/lib/CodeGen/TargetPassConfig.cpp9
1 files changed, 0 insertions, 9 deletions
diff --git a/llvm/lib/CodeGen/TargetPassConfig.cpp b/llvm/lib/CodeGen/TargetPassConfig.cpp
index c76903a24da..34d96a81130 100644
--- a/llvm/lib/CodeGen/TargetPassConfig.cpp
+++ b/llvm/lib/CodeGen/TargetPassConfig.cpp
@@ -88,8 +88,6 @@ static cl::opt<bool> DisableCGP("disable-cgp", cl::Hidden,
cl::desc("Disable Codegen Prepare"));
static cl::opt<bool> DisableCopyProp("disable-copyprop", cl::Hidden,
cl::desc("Disable Copy Propagation pass"));
-static cl::opt<bool> DisableCopyPropPreRegRewrite("disable-copyprop-prerewrite", cl::Hidden,
- cl::desc("Disable Copy Propagation Pre-Register Re-write pass"));
static cl::opt<bool> DisablePartialLibcallInlining("disable-partial-libcall-inlining",
cl::Hidden, cl::desc("Disable Partial Libcall Inlining"));
static cl::opt<bool> EnableImplicitNullChecks(
@@ -250,9 +248,6 @@ static IdentifyingPassPtr overridePass(AnalysisID StandardID,
if (StandardID == &MachineCopyPropagationID)
return applyDisable(TargetID, DisableCopyProp);
- if (StandardID == &MachineCopyPropagationPreRegRewriteID)
- return applyDisable(TargetID, DisableCopyPropPreRegRewrite);
-
return TargetID;
}
@@ -1061,10 +1056,6 @@ void TargetPassConfig::addOptimizedRegAlloc(FunctionPass *RegAllocPass) {
// Allow targets to change the register assignments before rewriting.
addPreRewrite();
- // Copy propagate to forward register uses and try to eliminate COPYs that
- // were not coalesced.
- addPass(&MachineCopyPropagationPreRegRewriteID);
-
// Finally rewrite virtual registers.
addPass(&VirtRegRewriterID);
OpenPOWER on IntegriCloud