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-rw-r--r--llvm/lib/CodeGen/TargetLoweringBase.cpp9
1 files changed, 5 insertions, 4 deletions
diff --git a/llvm/lib/CodeGen/TargetLoweringBase.cpp b/llvm/lib/CodeGen/TargetLoweringBase.cpp
index 4d07da80b90..8d7222fb5b2 100644
--- a/llvm/lib/CodeGen/TargetLoweringBase.cpp
+++ b/llvm/lib/CodeGen/TargetLoweringBase.cpp
@@ -1184,11 +1184,12 @@ static unsigned getVectorTypeBreakdownMVT(MVT VT, MVT &IntermediateVT,
/// isLegalRC - Return true if the value types that can be represented by the
/// specified register class are all legal.
-bool TargetLoweringBase::isLegalRC(const TargetRegisterInfo &TRI,
- const TargetRegisterClass &RC) const {
- for (auto I = TRI.valuetypes_begin(RC); *I != MVT::Other; ++I)
+bool TargetLoweringBase::isLegalRC(const TargetRegisterClass *RC) const {
+ for (TargetRegisterClass::vt_iterator I = RC->vt_begin(), E = RC->vt_end();
+ I != E; ++I) {
if (isTypeLegal(*I))
return true;
+ }
return false;
}
@@ -1300,7 +1301,7 @@ TargetLoweringBase::findRepresentativeClass(const TargetRegisterInfo *TRI,
// We want the largest possible spill size.
if (TRI->getSpillSize(*SuperRC) <= TRI->getSpillSize(*BestRC))
continue;
- if (!isLegalRC(*TRI, *SuperRC))
+ if (!isLegalRC(SuperRC))
continue;
BestRC = SuperRC;
}
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