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-rw-r--r--llvm/lib/CodeGen/MachineSink.cpp21
1 files changed, 13 insertions, 8 deletions
diff --git a/llvm/lib/CodeGen/MachineSink.cpp b/llvm/lib/CodeGen/MachineSink.cpp
index 79e3fea3f90..dd6e26d8f8b 100644
--- a/llvm/lib/CodeGen/MachineSink.cpp
+++ b/llvm/lib/CodeGen/MachineSink.cpp
@@ -1,4 +1,4 @@
-//===-- MachineSink.cpp - Sinking for machine instructions ----------------===//
+//===- MachineSink.cpp - Sinking for machine instructions -----------------===//
//
// The LLVM Compiler Infrastructure
//
@@ -18,6 +18,7 @@
#include "llvm/ADT/SetVector.h"
#include "llvm/ADT/SmallSet.h"
+#include "llvm/ADT/SmallVector.h"
#include "llvm/ADT/SparseBitVector.h"
#include "llvm/ADT/Statistic.h"
#include "llvm/Analysis/AliasAnalysis.h"
@@ -32,8 +33,10 @@
#include "llvm/CodeGen/MachineOperand.h"
#include "llvm/CodeGen/MachinePostDominators.h"
#include "llvm/CodeGen/MachineRegisterInfo.h"
-#include "llvm/CodeGen/Passes.h"
+#include "llvm/IR/BasicBlock.h"
#include "llvm/IR/LLVMContext.h"
+#include "llvm/Pass.h"
+#include "llvm/Support/BranchProbability.h"
#include "llvm/Support/CommandLine.h"
#include "llvm/Support/Debug.h"
#include "llvm/Support/raw_ostream.h"
@@ -93,12 +96,12 @@ namespace {
// Remember which edges we are about to split.
// This is different from CEBCandidates since those edges
// will be split.
- SetVector<std::pair<MachineBasicBlock*, MachineBasicBlock*> > ToSplit;
+ SetVector<std::pair<MachineBasicBlock *, MachineBasicBlock *>> ToSplit;
SparseBitVector<> RegsToClearKillFlags;
- typedef std::map<MachineBasicBlock *, SmallVector<MachineBasicBlock *, 4>>
- AllSuccsCache;
+ using AllSuccsCache =
+ std::map<MachineBasicBlock *, SmallVector<MachineBasicBlock *, 4>>;
public:
static char ID; // Pass identification
@@ -133,6 +136,7 @@ namespace {
bool isWorthBreakingCriticalEdge(MachineInstr &MI,
MachineBasicBlock *From,
MachineBasicBlock *To);
+
/// \brief Postpone the splitting of the given critical
/// edge (\p From, \p To).
///
@@ -150,6 +154,7 @@ namespace {
MachineBasicBlock *To,
bool BreakPHIEdge);
bool SinkInstruction(MachineInstr &MI, bool &SawStore,
+
AllSuccsCache &AllSuccessors);
bool AllUsesDominatedByBlock(unsigned Reg, MachineBasicBlock *MBB,
MachineBasicBlock *DefMBB,
@@ -172,7 +177,9 @@ namespace {
} // end anonymous namespace
char MachineSinking::ID = 0;
+
char &llvm::MachineSinkingID = MachineSinking::ID;
+
INITIALIZE_PASS_BEGIN(MachineSinking, DEBUG_TYPE,
"Machine code sinking", false, false)
INITIALIZE_PASS_DEPENDENCY(MachineBranchProbabilityInfo)
@@ -570,7 +577,6 @@ bool MachineSinking::isProfitableToSinkTo(unsigned Reg, MachineInstr &MI,
SmallVector<MachineBasicBlock *, 4> &
MachineSinking::GetAllSortedSuccessors(MachineInstr &MI, MachineBasicBlock *MBB,
AllSuccsCache &AllSuccessors) const {
-
// Do we have the sorted successors in cache ?
auto Succs = AllSuccessors.find(MBB);
if (Succs != AllSuccessors.end())
@@ -711,7 +717,7 @@ MachineSinking::FindSuccToSinkTo(MachineInstr &MI, MachineBasicBlock *MBB,
static bool SinkingPreventsImplicitNullCheck(MachineInstr &MI,
const TargetInstrInfo *TII,
const TargetRegisterInfo *TRI) {
- typedef TargetInstrInfo::MachineBranchPredicate MachineBranchPredicate;
+ using MachineBranchPredicate = TargetInstrInfo::MachineBranchPredicate;
auto *MBB = MI.getParent();
if (MBB->pred_size() != 1)
@@ -784,7 +790,6 @@ bool MachineSinking::SinkInstruction(MachineInstr &MI, bool &SawStore,
if (!SuccToSinkTo)
return false;
-
// If the instruction to move defines a dead physical register which is live
// when leaving the basic block, don't move it because it could turn into a
// "zombie" define of that preg. E.g., EFLAGS. (<rdar://problem/8030636>)
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