diff options
Diffstat (limited to 'llvm/docs')
| -rw-r--r-- | llvm/docs/ReleaseNotes.rst | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst index 74fe35c8987..1510ca5a5e2 100644 --- a/llvm/docs/ReleaseNotes.rst +++ b/llvm/docs/ReleaseNotes.rst @@ -134,6 +134,13 @@ Changes to the X86 Target Intel CPUs. This tries to limit the use of 512-bit registers which can cause a decrease in CPU frequency on these CPUs. This can be re-enabled by passing -mprefer-vector-width=512 to clang or passing -mattr=-prefer-256-bit to llc. +* Deprecated the mpx feature flag for the Intel MPX instructions. There were no + intrinsics for this feature. This change only this effects the results + returned by getHostCPUFeatures on CPUs that implement the MPX instructions. +* The feature flag fast-partial-ymm-or-zmm-write which previously disabled + vzeroupper insertion has been removed. It has been replaced with a vzeroupper + feature flag which has the opposite polarity. So -vzeroupper has the same + effect as +fast-partial-ymm-or-zmm-write. Changes to the AMDGPU Target ----------------------------- @@ -143,10 +150,6 @@ Changes to the AVR Target During this release ... -* Deprecated the mpx feature flag for the Intel MPX instructions. There were no - intrinsics for this feature. This change only this effects the results - returned by getHostCPUFeatures on CPUs that implement the MPX instructions. - Changes to the WebAssembly Target --------------------------------- |
