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-rw-r--r--llvm/docs/ReleaseNotes.rst20
1 files changed, 19 insertions, 1 deletions
diff --git a/llvm/docs/ReleaseNotes.rst b/llvm/docs/ReleaseNotes.rst
index b4d68be9f85..b9498302a97 100644
--- a/llvm/docs/ReleaseNotes.rst
+++ b/llvm/docs/ReleaseNotes.rst
@@ -183,7 +183,25 @@ Miscellaneous
Changes to the PowerPC Target
-----------------------------
-During this release ...
+There are numerous improvements to the PowerPC target in this release:
+
+* LLVM now generates the Vector-Scalar eXtension (VSX) instructions from
+ version 2.06 of the Power ISA, for both big- and little-endian targets.
+
+* LLVM now has a POWER8 instruction scheduling description.
+
+* Address Sanitizer (ASAN) support is now fully functional.
+
+* Performance of simple atomic accesses has been greatly improved.
+
+* Atomic fences now use light-weight syncs where possible, again providing
+ significant performance benefit.
+
+* The PowerPC target now supports PIC levels (-fPIC vs. -fpic).
+
+* PPC32 SVR4 now supports small-model PIC.
+
+* There have been many smaller bug fixes and performance improvements.
External Open Source Projects Using LLVM 3.6
============================================
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