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Diffstat (limited to 'llvm/docs/CodeGenerator.rst')
| -rw-r--r-- | llvm/docs/CodeGenerator.rst | 21 |
1 files changed, 12 insertions, 9 deletions
diff --git a/llvm/docs/CodeGenerator.rst b/llvm/docs/CodeGenerator.rst index 75d893b1393..343b9879972 100644 --- a/llvm/docs/CodeGenerator.rst +++ b/llvm/docs/CodeGenerator.rst @@ -579,15 +579,18 @@ inside bundles. The top level BUNDLE instruction must have the correct set of register MachineOperand's that represent the cumulative inputs and outputs of the bundled MIs. -Packing / bundling of MachineInstr's should be done as part of the register -allocation super-pass. More specifically, the pass which determines what MIs -should be bundled together must be done after code generator exits SSA form -(i.e. after two-address pass, PHI elimination, and copy coalescing). Bundles -should only be finalized (i.e. adding BUNDLE MIs and input and output register -MachineOperands) after virtual registers have been rewritten into physical -registers. This requirement eliminates the need to add virtual register operands -to BUNDLE instructions which would effectively double the virtual register def -and use lists. +Packing / bundling of MachineInstrs for VLIW architectures should +generally be done as part of the register allocation super-pass. More +specifically, the pass which determines what MIs should be bundled +together should be done after code generator exits SSA form +(i.e. after two-address pass, PHI elimination, and copy coalescing). +Such bundles should be finalized (i.e. adding BUNDLE MIs and input and +output register MachineOperands) after virtual registers have been +rewritten into physical registers. This eliminates the need to add +virtual register operands to BUNDLE instructions which would +effectively double the virtual register def and use lists. Bundles may +use virtual registers and be formed in SSA form, but may not be +appropriate for all use cases. .. _MC Layer: |
