1 files changed, 61 insertions, 12 deletions
diff --git a/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp b/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
index 781d5ac553f..b474e12d071 100644
--- a/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
+++ b/lldb/source/Plugins/Process/Linux/NativeProcessLinux.cpp
@@ -1551,25 +1551,74 @@ Status NativeProcessLinux::RemoveBreakpoint(lldb::addr_t addr, bool hardware) {
     return NativeProcessProtocol::RemoveBreakpoint(addr);
 }
 
-llvm::Expected<llvm::ArrayRef<uint8_t>>
-NativeProcessLinux::GetSoftwareBreakpointTrapOpcode(size_t size_hint) {
-  using ArrayRef = llvm::ArrayRef<uint8_t>;
+Status NativeProcessLinux::GetSoftwareBreakpointTrapOpcode(
+    size_t trap_opcode_size_hint, size_t &actual_opcode_size,
+    const uint8_t *&trap_opcode_bytes) {
+  // FIXME put this behind a breakpoint protocol class that can be set per
+  // architecture.  Need MIPS support here.
+  static const uint8_t g_aarch64_opcode[] = {0x00, 0x00, 0x20, 0xd4};
+  // The ARM reference recommends the use of 0xe7fddefe and 0xdefe but the
+  // linux kernel does otherwise.
+  static const uint8_t g_arm_breakpoint_opcode[] = {0xf0, 0x01, 0xf0, 0xe7};
+  static const uint8_t g_i386_opcode[] = {0xCC};
+  static const uint8_t g_mips64_opcode[] = {0x00, 0x00, 0x00, 0x0d};
+  static const uint8_t g_mips64el_opcode[] = {0x0d, 0x00, 0x00, 0x00};
+  static const uint8_t g_s390x_opcode[] = {0x00, 0x01};
+  static const uint8_t g_thumb_breakpoint_opcode[] = {0x01, 0xde};
+  static const uint8_t g_ppc64le_opcode[] = {0x08, 0x00, 0xe0, 0x7f}; // trap
+
+  switch (m_arch.GetMachine()) {
+  case llvm::Triple::aarch64:
+    trap_opcode_bytes = g_aarch64_opcode;
+    actual_opcode_size = sizeof(g_aarch64_opcode);
+    return Status();
 
-  switch (GetArchitecture().GetMachine()) {
   case llvm::Triple::arm:
-    // The ARM reference recommends the use of 0xe7fddefe and 0xdefe but the
-    // linux kernel does otherwise.
-    switch (size_hint) {
+    switch (trap_opcode_size_hint) {
     case 2:
-      return ArrayRef{0x01, 0xde};
+      trap_opcode_bytes = g_thumb_breakpoint_opcode;
+      actual_opcode_size = sizeof(g_thumb_breakpoint_opcode);
+      return Status();
     case 4:
-      return ArrayRef{0xf0, 0x01, 0xf0, 0xe7};
+      trap_opcode_bytes = g_arm_breakpoint_opcode;
+      actual_opcode_size = sizeof(g_arm_breakpoint_opcode);
+      return Status();
     default:
-      return llvm::createStringError(llvm::inconvertibleErrorCode(),
-                                     "Unrecognised trap opcode size hint!");
+      assert(false && "Unrecognised trap opcode size hint!");
+      return Status("Unrecognised trap opcode size hint!");
     }
+
+  case llvm::Triple::x86:
+  case llvm::Triple::x86_64:
+    trap_opcode_bytes = g_i386_opcode;
+    actual_opcode_size = sizeof(g_i386_opcode);
+    return Status();
+
+  case llvm::Triple::mips:
+  case llvm::Triple::mips64:
+    trap_opcode_bytes = g_mips64_opcode;
+    actual_opcode_size = sizeof(g_mips64_opcode);
+    return Status();
+
+  case llvm::Triple::mipsel:
+  case llvm::Triple::mips64el:
+    trap_opcode_bytes = g_mips64el_opcode;
+    actual_opcode_size = sizeof(g_mips64el_opcode);
+    return Status();
+
+  case llvm::Triple::systemz:
+    trap_opcode_bytes = g_s390x_opcode;
+    actual_opcode_size = sizeof(g_s390x_opcode);
+    return Status();
+
+  case llvm::Triple::ppc64le:
+    trap_opcode_bytes = g_ppc64le_opcode;
+    actual_opcode_size = sizeof(g_ppc64le_opcode);
+    return Status();
+
   default:
-    return NativeProcessProtocol::GetSoftwareBreakpointTrapOpcode(size_hint);
+    assert(false && "CPU type not supported!");
+    return Status("CPU type not supported");
   }
 }