diff options
Diffstat (limited to 'compiler-rt/lib/builtins/arm')
| -rw-r--r-- | compiler-rt/lib/builtins/arm/aeabi_cdcmp.S | 11 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/aeabi_cfcmp.S | 11 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/eqdf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/eqsf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/gedf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/gesf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/gtdf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/gtsf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/ledf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/lesf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/ltdf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/ltsf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/nedf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/nesf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/unorddf2vfp.S | 1 | ||||
| -rw-r--r-- | compiler-rt/lib/builtins/arm/unordsf2vfp.S | 1 |
16 files changed, 36 insertions, 0 deletions
diff --git a/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S b/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S index b67814d9f20..3e7a8b86b73 100644 --- a/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S +++ b/compiler-rt/lib/builtins/arm/aeabi_cdcmp.S @@ -48,7 +48,12 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cdcmpeq) // NaN has been ruled out, so __aeabi_cdcmple can't trap bne __aeabi_cdcmple +#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) + mov ip, #APSR_C + msr APSR_nzcvq, ip +#else msr CPSR_f, #APSR_C +#endif JMP(lr) #endif END_COMPILERRT_FUNCTION(__aeabi_cdcmpeq) @@ -95,17 +100,23 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cdcmple) lsls r0, r0, #31 pop {r0-r3, pc} #else + ITT(eq) moveq ip, #0 beq 1f ldm sp, {r0-r3} bl __aeabi_dcmpeq cmp r0, #1 + ITE(eq) moveq ip, #(APSR_C | APSR_Z) movne ip, #(APSR_C) 1: +#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) + msr APSR_nzcvq, ip +#else msr CPSR_f, ip +#endif pop {r0-r3} POP_PC() #endif diff --git a/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S b/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S index e37aa3d06c4..1f304ffd964 100644 --- a/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S +++ b/compiler-rt/lib/builtins/arm/aeabi_cfcmp.S @@ -48,7 +48,12 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) // NaN has been ruled out, so __aeabi_cfcmple can't trap bne __aeabi_cfcmple +#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) + mov ip, #APSR_C + msr APSR_nzcvq, ip +#else msr CPSR_f, #APSR_C +#endif JMP(lr) #endif END_COMPILERRT_FUNCTION(__aeabi_cfcmpeq) @@ -95,17 +100,23 @@ DEFINE_COMPILERRT_FUNCTION(__aeabi_cfcmple) lsls r0, r0, #31 pop {r0-r3, pc} #else + ITT(eq) moveq ip, #0 beq 1f ldm sp, {r0-r3} bl __aeabi_fcmpeq cmp r0, #1 + ITE(eq) moveq ip, #(APSR_C | APSR_Z) movne ip, #(APSR_C) 1: +#if defined(__ARM_ARCH_7M__) || defined(__ARM_ARCH_7EM__) + msr APSR_nzcvq, ip +#else msr CPSR_f, ip +#endif pop {r0-r3} POP_PC() #endif diff --git a/compiler-rt/lib/builtins/arm/eqdf2vfp.S b/compiler-rt/lib/builtins/arm/eqdf2vfp.S index 8fa0b2debc7..d5070657091 100644 --- a/compiler-rt/lib/builtins/arm/eqdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/eqdf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__eqdf2vfp) vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr + ITE(eq) moveq r0, #1 // set result register to 1 if equal movne r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/eqsf2vfp.S b/compiler-rt/lib/builtins/arm/eqsf2vfp.S index 3776bf4874c..fd72b2fdbde 100644 --- a/compiler-rt/lib/builtins/arm/eqsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/eqsf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__eqsf2vfp) vcmp.f32 s14, s15 #endif vmrs apsr_nzcv, fpscr + ITE(eq) moveq r0, #1 // set result register to 1 if equal movne r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/gedf2vfp.S b/compiler-rt/lib/builtins/arm/gedf2vfp.S index 14899f00aab..364fc5b24cd 100644 --- a/compiler-rt/lib/builtins/arm/gedf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gedf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__gedf2vfp) vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr + ITE(ge) movge r0, #1 // set result register to 1 if greater than or equal movlt r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/gesf2vfp.S b/compiler-rt/lib/builtins/arm/gesf2vfp.S index b49d04d1c23..346c3473ae4 100644 --- a/compiler-rt/lib/builtins/arm/gesf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gesf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__gesf2vfp) vcmp.f32 s14, s15 #endif vmrs apsr_nzcv, fpscr + ITE(ge) movge r0, #1 // set result register to 1 if greater than or equal movlt r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/gtdf2vfp.S b/compiler-rt/lib/builtins/arm/gtdf2vfp.S index 8166305e3af..3389c3ad973 100644 --- a/compiler-rt/lib/builtins/arm/gtdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gtdf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__gtdf2vfp) vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr + ITE(gt) movgt r0, #1 // set result register to 1 if equal movle r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/gtsf2vfp.S b/compiler-rt/lib/builtins/arm/gtsf2vfp.S index d2d8a2380fc..afdba8b018e 100644 --- a/compiler-rt/lib/builtins/arm/gtsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/gtsf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__gtsf2vfp) vcmp.f32 s14, s15 #endif vmrs apsr_nzcv, fpscr + ITE(gt) movgt r0, #1 // set result register to 1 if equal movle r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/ledf2vfp.S b/compiler-rt/lib/builtins/arm/ledf2vfp.S index a9dab77c146..4bbe4c86837 100644 --- a/compiler-rt/lib/builtins/arm/ledf2vfp.S +++ b/compiler-rt/lib/builtins/arm/ledf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__ledf2vfp) vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr + ITE(ls) movls r0, #1 // set result register to 1 if equal movhi r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/lesf2vfp.S b/compiler-rt/lib/builtins/arm/lesf2vfp.S index 7e127f465cf..51232bd8ced 100644 --- a/compiler-rt/lib/builtins/arm/lesf2vfp.S +++ b/compiler-rt/lib/builtins/arm/lesf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__lesf2vfp) vcmp.f32 s14, s15 #endif vmrs apsr_nzcv, fpscr + ITE(ls) movls r0, #1 // set result register to 1 if equal movhi r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/ltdf2vfp.S b/compiler-rt/lib/builtins/arm/ltdf2vfp.S index 8b6f8e4cc8a..8e2928c813d 100644 --- a/compiler-rt/lib/builtins/arm/ltdf2vfp.S +++ b/compiler-rt/lib/builtins/arm/ltdf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__ltdf2vfp) vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr + ITE(mi) movmi r0, #1 // set result register to 1 if equal movpl r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/ltsf2vfp.S b/compiler-rt/lib/builtins/arm/ltsf2vfp.S index c4ff812b49a..59c00c6bab6 100644 --- a/compiler-rt/lib/builtins/arm/ltsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/ltsf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__ltsf2vfp) vcmp.f32 s14, s15 #endif vmrs apsr_nzcv, fpscr + ITE(mi) movmi r0, #1 // set result register to 1 if equal movpl r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/nedf2vfp.S b/compiler-rt/lib/builtins/arm/nedf2vfp.S index 7d884e07204..aef72eb0097 100644 --- a/compiler-rt/lib/builtins/arm/nedf2vfp.S +++ b/compiler-rt/lib/builtins/arm/nedf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__nedf2vfp) vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr + ITE(ne) movne r0, #1 // set result register to 0 if unequal moveq r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/nesf2vfp.S b/compiler-rt/lib/builtins/arm/nesf2vfp.S index 97c764f6369..50d60f49300 100644 --- a/compiler-rt/lib/builtins/arm/nesf2vfp.S +++ b/compiler-rt/lib/builtins/arm/nesf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__nesf2vfp) vcmp.f32 s14, s15 #endif vmrs apsr_nzcv, fpscr + ITE(ne) movne r0, #1 // set result register to 1 if unequal moveq r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/unorddf2vfp.S b/compiler-rt/lib/builtins/arm/unorddf2vfp.S index 85563754700..6625fa8a311 100644 --- a/compiler-rt/lib/builtins/arm/unorddf2vfp.S +++ b/compiler-rt/lib/builtins/arm/unorddf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__unorddf2vfp) vcmp.f64 d6, d7 #endif vmrs apsr_nzcv, fpscr + ITE(vs) movvs r0, #1 // set result register to 1 if "overflow" (any NaNs) movvc r0, #0 bx lr diff --git a/compiler-rt/lib/builtins/arm/unordsf2vfp.S b/compiler-rt/lib/builtins/arm/unordsf2vfp.S index 2b16b4905c4..0b5da2ba3e1 100644 --- a/compiler-rt/lib/builtins/arm/unordsf2vfp.S +++ b/compiler-rt/lib/builtins/arm/unordsf2vfp.S @@ -27,6 +27,7 @@ DEFINE_COMPILERRT_FUNCTION(__unordsf2vfp) vcmp.f32 s14, s15 #endif vmrs apsr_nzcv, fpscr + ITE(vs) movvs r0, #1 // set result register to 1 if "overflow" (any NaNs) movvc r0, #0 bx lr |
