diff options
Diffstat (limited to 'clang/test')
-rw-r--r-- | clang/test/Sema/arm64-inline-asm.c | 2 | ||||
-rw-r--r-- | clang/test/Sema/inline-asm-validate-aarch64.c | 38 | ||||
-rw-r--r-- | clang/test/Sema/inline-asm-validate.c | 2 |
3 files changed, 40 insertions, 2 deletions
diff --git a/clang/test/Sema/arm64-inline-asm.c b/clang/test/Sema/arm64-inline-asm.c index 2cfbe469296..d8e16a6872c 100644 --- a/clang/test/Sema/arm64-inline-asm.c +++ b/clang/test/Sema/arm64-inline-asm.c @@ -5,5 +5,5 @@ void foo() { asm volatile("USE(%x0)" :: "z"(0LL)); asm volatile("USE(%w0)" :: "z"(0)); - asm volatile("USE(%0)" :: "z"(0)); // expected-warning {{value size does not match register size specified by the constraint and modifier}} + asm volatile("USE(%0)" :: "z"(0)); // expected-warning {{value size does not match register size specified by the constraint and modifier}} expected-note {{use constraint modifier "w"}} } diff --git a/clang/test/Sema/inline-asm-validate-aarch64.c b/clang/test/Sema/inline-asm-validate-aarch64.c new file mode 100644 index 00000000000..1364b6421eb --- /dev/null +++ b/clang/test/Sema/inline-asm-validate-aarch64.c @@ -0,0 +1,38 @@ +// RUN: %clang_cc1 -triple arm64-apple-darwin -fsyntax-only -fdiagnostics-parseable-fixits %s 2>&1 | FileCheck %s + +typedef unsigned char uint8_t; + +uint8_t constraint_r(uint8_t *addr) { + uint8_t byte; + + __asm__ volatile("ldrb %0, [%1]" : "=r" (byte) : "r" (addr) : "memory"); +// CHECK: warning: value size does not match register size specified by the constraint and modifier +// CHECK: note: use constraint modifier "w" +// CHECK: fix-it:{{.*}}:{8:26-8:28}:"%w0" + + return byte; +} + +uint8_t constraint_r_symbolic(uint8_t *addr) { + uint8_t byte; + + __asm__ volatile("ldrb %[s0], [%[s1]]" : [s0] "=r" (byte) : [s1] "r" (addr) : "memory"); +// CHECK: warning: value size does not match register size specified by the constraint and modifier +// CHECK: note: use constraint modifier "w" +// CHECK: fix-it:{{.*}}:{19:26-19:31}:"%w[s0]" + + return byte; +} + +#define PERCENT "%" + +uint8_t constraint_r_symbolic_macro(uint8_t *addr) { + uint8_t byte; + + __asm__ volatile("ldrb "PERCENT"[s0], [%[s1]]" : [s0] "=r" (byte) : [s1] "r" (addr) : "memory"); +// CHECK: warning: value size does not match register size specified by the constraint and modifier +// CHECK: note: use constraint modifier "w" +// CHECK-NOT: fix-it + + return byte; +} diff --git a/clang/test/Sema/inline-asm-validate.c b/clang/test/Sema/inline-asm-validate.c index 6fa760c8092..73335e76cd8 100644 --- a/clang/test/Sema/inline-asm-validate.c +++ b/clang/test/Sema/inline-asm-validate.c @@ -3,6 +3,6 @@ unsigned t, r, *p; int foo (void) { - __asm__ __volatile__( "stxr %w[_t], %[_r], [%[_p]]" : [_t] "=&r" (t) : [_p] "p" (p), [_r] "r" (r) : "memory"); // expected-warning{{value size does not match register size specified by the constraint and modifier}} + __asm__ __volatile__( "stxr %w[_t], %[_r], [%[_p]]" : [_t] "=&r" (t) : [_p] "p" (p), [_r] "r" (r) : "memory"); // expected-warning{{value size does not match register size specified by the constraint and modifier}} expected-note {{use constraint modifier "w"}} return 1; } |