summaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
-rw-r--r--lld/ELF/InputSection.cpp4
-rw-r--r--lld/test/ELF/aarch64-undefined-weak.s2
2 files changed, 3 insertions, 3 deletions
diff --git a/lld/ELF/InputSection.cpp b/lld/ELF/InputSection.cpp
index 5f3df546b1d..30a9fc288a4 100644
--- a/lld/ELF/InputSection.cpp
+++ b/lld/ELF/InputSection.cpp
@@ -671,11 +671,11 @@ static uint64_t getRelocTargetVA(const InputFile *File, RelType Type, int64_t A,
return In.MipsGot->getVA() + In.MipsGot->getTlsIndexOffset(File) -
In.MipsGot->getGp(File);
case R_AARCH64_PAGE_PC: {
- uint64_t Val = Sym.isUndefWeak() ? A : Sym.getVA(A);
+ uint64_t Val = Sym.isUndefWeak() ? P + A : Sym.getVA(A);
return getAArch64Page(Val) - getAArch64Page(P);
}
case R_AARCH64_PLT_PAGE_PC: {
- uint64_t Val = Sym.isUndefWeak() ? A : Sym.getPltVA() + A;
+ uint64_t Val = Sym.isUndefWeak() ? P + A : Sym.getPltVA() + A;
return getAArch64Page(Val) - getAArch64Page(P);
}
case R_RISCV_PC_INDIRECT: {
diff --git a/lld/test/ELF/aarch64-undefined-weak.s b/lld/test/ELF/aarch64-undefined-weak.s
index 893f99a5ff8..ef14bfc237a 100644
--- a/lld/test/ELF/aarch64-undefined-weak.s
+++ b/lld/test/ELF/aarch64-undefined-weak.s
@@ -40,7 +40,7 @@ _start:
// CHECK-NEXT: 210008: {{.*}} b.eq #4
// CHECK-NEXT: 21000c: {{.*}} cbz x1, #4
// CHECK-NEXT: 210010: {{.*}} adr x0, #0
-// CHECK-NEXT: 210014: {{.*}} adrp x0, #-2162688
+// CHECK-NEXT: 210014: {{.*}} adrp x0, #0
// CHECK: 210018: {{.*}} .word 0x00000000
// CHECK-NEXT: 21001c: {{.*}} .word 0x00000000
// CHECK-NEXT: 210020: {{.*}} .word 0x00000000
OpenPOWER on IntegriCloud